xref: /linux/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml (revision 50501936288d6a29d7ef78f25d00e33240fad45f) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/qcom,msm8909-tlmm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Technologies, Inc. MSM8909 TLMM block
8
9maintainers:
10  - Stephan Gerhold <stephan@gerhold.net>
11
12description: |
13  Top Level Mode Multiplexer pin controller in Qualcomm MSM8909 SoC.
14
15allOf:
16  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
17
18properties:
19  compatible:
20    const: qcom,msm8909-tlmm
21
22  reg:
23    maxItems: 1
24
25  interrupts:
26    maxItems: 1
27
28  interrupt-controller: true
29  "#interrupt-cells": true
30  gpio-controller: true
31  gpio-reserved-ranges: true
32  "#gpio-cells": true
33  gpio-ranges: true
34  wakeup-parent: true
35
36required:
37  - compatible
38  - reg
39
40additionalProperties: false
41
42patternProperties:
43  "-state$":
44    oneOf:
45      - $ref: "#/$defs/qcom-msm8909-tlmm-state"
46      - patternProperties:
47          "-pins$":
48            $ref: "#/$defs/qcom-msm8909-tlmm-state"
49        additionalProperties: false
50
51$defs:
52  qcom-msm8909-tlmm-state:
53    type: object
54    description:
55      Pinctrl node's client devices use subnodes for desired pin configuration.
56      Client device subnodes use below standard properties.
57    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
58    unevaluatedProperties: false
59
60    properties:
61      pins:
62        description:
63          List of gpio pins affected by the properties specified in this
64          subnode.
65        items:
66          oneOf:
67            - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-2])$"
68            - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd,
69                      sdc2_data, qdsd_clk, qdsd_cmd, qdsd_data0, qdsd_data1,
70                      qdsd_data2, qdsd_data3 ]
71        minItems: 1
72        maxItems: 16
73
74      function:
75        description:
76          Specify the alternative function to be configured for the specified
77          pins.
78        enum: [ adsp_ext, atest_bbrx0, atest_bbrx1, atest_char, atest_char0,
79                atest_char1, atest_char2, atest_char3, atest_combodac,
80                atest_gpsadc0, atest_gpsadc1, atest_wlan0, atest_wlan1,
81                bimc_dte0, bimc_dte1, blsp_i2c1, blsp_i2c2, blsp_i2c3,
82                blsp_i2c4, blsp_i2c5, blsp_i2c6, blsp_spi1, blsp_spi1_cs1,
83                blsp_spi1_cs2, blsp_spi1_cs3, blsp_spi2, blsp_spi2_cs1,
84                blsp_spi2_cs2, blsp_spi2_cs3, blsp_spi3, blsp_spi3_cs1,
85                blsp_spi3_cs2, blsp_spi3_cs3, blsp_spi4, blsp_spi5, blsp_spi6,
86                blsp_uart1, blsp_uart2, blsp_uim1, blsp_uim2, cam_mclk,
87                cci_async, cci_timer0, cci_timer1, cci_timer2, cdc_pdm0,
88                dbg_out, dmic0_clk, dmic0_data, ebi0_wrcdc, ebi2_a, ebi2_lcd,
89                ext_lpass, gcc_gp1_clk_a, gcc_gp1_clk_b, gcc_gp2_clk_a,
90                gcc_gp2_clk_b, gcc_gp3_clk_a, gcc_gp3_clk_b, gcc_plltest, gpio,
91                gsm0_tx, ldo_en, ldo_update, m_voc, mdp_vsync, modem_tsync,
92                nav_pps, nav_tsync, pa_indicator, pbs0, pbs1, pbs2,
93                pri_mi2s_data0_a, pri_mi2s_data0_b, pri_mi2s_data1_a,
94                pri_mi2s_data1_b, pri_mi2s_mclk_a, pri_mi2s_mclk_b,
95                pri_mi2s_sck_a, pri_mi2s_sck_b, pri_mi2s_ws_a, pri_mi2s_ws_b,
96                prng_rosc, pwr_crypto_enabled_a, pwr_crypto_enabled_b,
97                pwr_modem_enabled_a, pwr_modem_enabled_b, pwr_nav_enabled_a,
98                pwr_nav_enabled_b, qdss_cti_trig_in_a0, qdss_cti_trig_in_a1,
99                qdss_cti_trig_in_b0, qdss_cti_trig_in_b1, qdss_cti_trig_out_a0,
100                qdss_cti_trig_out_a1, qdss_cti_trig_out_b0,
101                qdss_cti_trig_out_b1, qdss_traceclk_a, qdss_tracectl_a,
102                qdss_tracedata_a, qdss_tracedata_b, sd_write, sec_mi2s,
103                smb_int, ssbi0, ssbi1, uim1_clk, uim1_data, uim1_present,
104                uim1_reset, uim2_clk, uim2_data, uim2_present, uim2_reset,
105                uim3_clk, uim3_data, uim3_present, uim3_reset, uim_batt,
106                wcss_bt, wcss_fm, wcss_wlan ]
107
108    required:
109      - pins
110
111examples:
112  - |
113    #include <dt-bindings/interrupt-controller/arm-gic.h>
114
115    pinctrl@1000000 {
116        compatible = "qcom,msm8909-tlmm";
117        reg = <0x1000000 0x300000>;
118        interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
119        gpio-controller;
120        #gpio-cells = <2>;
121        gpio-ranges = <&tlmm 0 0 113>;
122        interrupt-controller;
123        #interrupt-cells = <2>;
124
125        gpio-wo-subnode-state {
126            pins = "gpio1";
127            function = "gpio";
128        };
129
130        uart-w-subnodes-state {
131            rx-pins {
132                pins = "gpio4";
133                function = "blsp_uart1";
134                bias-pull-up;
135            };
136
137            tx-pins {
138                pins = "gpio5";
139                function = "blsp_uart1";
140                bias-disable;
141            };
142        };
143    };
144...
145