xref: /linux/Documentation/devicetree/bindings/pinctrl/qcom,lpass-lpi-common.yaml (revision 6f47c7ae8c7afaf9ad291d39f0d3974f191a7946)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/qcom,lpass-lpi-common.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm SoC LPASS LPI TLMM Common Properties
8
9maintainers:
10  - Bjorn Andersson <andersson@kernel.org>
11  - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
12  - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
13
14description:
15  Common properties for the Top Level Mode Multiplexer pin controllers in the
16  Low Power Audio SubSystem (LPASS) Low Power Island (LPI) of Qualcomm SoCs.
17
18properties:
19  gpio-controller: true
20
21  "#gpio-cells":
22    description:
23      Specifying the pin number and flags, as defined in
24      include/dt-bindings/gpio/gpio.h
25    const: 2
26
27  gpio-ranges:
28    maxItems: 1
29
30required:
31  - gpio-controller
32  - "#gpio-cells"
33  - gpio-ranges
34
35allOf:
36  - $ref: pinctrl.yaml#
37
38additionalProperties: true
39
40$defs:
41  qcom-tlmm-state:
42    properties:
43      drive-strength:
44        enum: [2, 4, 6, 8, 10, 12, 14, 16]
45        default: 2
46        description:
47          Selects the drive strength for the specified pins, in mA.
48
49      slew-rate:
50        enum: [0, 1, 2, 3]
51        default: 0
52        description: |
53          0: No adjustments
54          1: Higher Slew rate (faster edges)
55          2: Lower Slew rate (slower edges)
56          3: Reserved (No adjustments)
57
58      bias-bus-hold: true
59      bias-pull-down: true
60      bias-pull-up: true
61      bias-disable: true
62      input-enable: true
63      output-high: true
64      output-low: true
65
66    required:
67      - pins
68      - function
69
70    allOf:
71      - $ref: pincfg-node.yaml#
72      - $ref: pinmux-node.yaml#
73
74    additionalProperties: true
75
76