1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/qcom,ipq8074-pinctrl.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm IPQ8074 TLMM pin controller 8 9maintainers: 10 - Bjorn Andersson <andersson@kernel.org> 11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 12 13description: 14 Top Level Mode Multiplexer pin controller in Qualcomm IPQ8074 SoC. 15 16properties: 17 compatible: 18 const: qcom,ipq8074-pinctrl 19 20 reg: 21 maxItems: 1 22 23 interrupts: 24 maxItems: 1 25 26 gpio-reserved-ranges: 27 minItems: 1 28 maxItems: 35 29 30 gpio-line-names: 31 maxItems: 70 32 33patternProperties: 34 "-state$": 35 oneOf: 36 - $ref: "#/$defs/qcom-ipq8074-tlmm-state" 37 - patternProperties: 38 "-pins$": 39 $ref: "#/$defs/qcom-ipq8074-tlmm-state" 40 additionalProperties: false 41 42$defs: 43 qcom-ipq8074-tlmm-state: 44 type: object 45 description: 46 Pinctrl node's client devices use subnodes for desired pin configuration. 47 Client device subnodes use below standard properties. 48 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state 49 unevaluatedProperties: false 50 51 properties: 52 pins: 53 description: 54 List of gpio pins affected by the properties specified in this 55 subnode. 56 items: 57 pattern: "^gpio([0-9]|[1-6][0-9]|70)$" 58 minItems: 1 59 maxItems: 36 60 61 function: 62 description: 63 Specify the alternative function to be configured for the specified 64 pins. 65 66 enum: [ gpio, atest_char, atest_char0, atest_char1, atest_char2, 67 atest_char3, audio_rxbclk, audio_rxd, audio_rxfsync, 68 audio_rxmclk, audio_txbclk, audio_txd, audio_txfsync, 69 audio_txmclk, blsp0_i2c, blsp0_spi, blsp0_uart, blsp1_i2c, 70 blsp1_spi, blsp1_uart, blsp2_i2c, blsp2_spi, blsp2_uart, 71 blsp3_i2c, blsp3_spi, blsp3_spi0, blsp3_spi1, blsp3_spi2, 72 blsp3_spi3, blsp3_uart, blsp4_i2c0, blsp4_i2c1, blsp4_spi0, 73 blsp4_spi1, blsp4_uart0, blsp4_uart1, blsp5_i2c, blsp5_spi, 74 blsp5_uart, burn0, burn1, cri_trng, cri_trng0, cri_trng1, cxc0, 75 cxc1, dbg_out, gcc_plltest, gcc_tlmm, ldo_en, ldo_update, led0, 76 led1, led2, mac0_sa0, mac0_sa1, mac1_sa0, mac1_sa1, mac1_sa2, 77 mac1_sa3, mac2_sa0, mac2_sa1, mdc, mdio, pcie0_clk, pcie0_rst, 78 pcie0_wake, pcie1_clk, pcie1_rst, pcie1_wake, pcm_drx, pcm_dtx, 79 pcm_fsync, pcm_pclk, pcm_zsi0, pcm_zsi1, prng_rosc, pta1_0, 80 pta1_1, pta1_2, pta2_0, pta2_1, pta2_2, pwm0, pwm1, pwm2, pwm3, 81 qdss_cti_trig_in_a0, qdss_cti_trig_in_a1, qdss_cti_trig_in_b0, 82 qdss_cti_trig_in_b1, qdss_cti_trig_out_a0, 83 qdss_cti_trig_out_a1, qdss_cti_trig_out_b0, 84 qdss_cti_trig_out_b1, qdss_traceclk_a, qdss_traceclk_b, 85 qdss_tracectl_a, qdss_tracectl_b, qdss_tracedata_a, 86 qdss_tracedata_b, qpic, rx0, rx1, rx2, sd_card, sd_write, 87 tsens_max, wci2a, wci2b, wci2c, wci2d ] 88 89 required: 90 - pins 91 92allOf: 93 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# 94 95required: 96 - compatible 97 - reg 98 99unevaluatedProperties: false 100 101examples: 102 - | 103 #include <dt-bindings/interrupt-controller/arm-gic.h> 104 105 tlmm: pinctrl@1000000 { 106 compatible = "qcom,ipq8074-pinctrl"; 107 reg = <0x01000000 0x300000>; 108 gpio-controller; 109 #gpio-cells = <0x2>; 110 gpio-ranges = <&tlmm 0 0 70>; 111 interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; 112 interrupt-controller; 113 #interrupt-cells = <0x2>; 114 115 serial4-state { 116 pins = "gpio23", "gpio24"; 117 function = "blsp4_uart1"; 118 drive-strength = <8>; 119 bias-disable; 120 }; 121 }; 122