xref: /linux/Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml (revision c09acbc499e883a31e44d7ead3441c495b17df33)
1eed1015cSSricharan R# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2eed1015cSSricharan R%YAML 1.2
3eed1015cSSricharan R---
4eed1015cSSricharan R$id: http://devicetree.org/schemas/pinctrl/qcom,ipq6018-pinctrl.yaml#
5eed1015cSSricharan R$schema: http://devicetree.org/meta-schemas/core.yaml#
6eed1015cSSricharan R
7eed1015cSSricharan Rtitle: Qualcomm Technologies, Inc. IPQ6018 TLMM block
8eed1015cSSricharan R
9eed1015cSSricharan Rmaintainers:
10eed1015cSSricharan R  - Sricharan R <sricharan@codeaurora.org>
11eed1015cSSricharan R
12eed1015cSSricharan Rdescription: |
13eed1015cSSricharan R  This binding describes the Top Level Mode Multiplexer block found in the
14eed1015cSSricharan R  IPQ6018 platform.
15eed1015cSSricharan R
16eed1015cSSricharan Rproperties:
17eed1015cSSricharan R  compatible:
18eed1015cSSricharan R    const: qcom,ipq6018-pinctrl
19eed1015cSSricharan R
20eed1015cSSricharan R  reg:
21eed1015cSSricharan R    maxItems: 1
22eed1015cSSricharan R
23eed1015cSSricharan R  interrupts:
24eed1015cSSricharan R    description: Specifies the TLMM summary IRQ
25eed1015cSSricharan R    maxItems: 1
26eed1015cSSricharan R
27eed1015cSSricharan R  interrupt-controller: true
28eed1015cSSricharan R
29eed1015cSSricharan R  '#interrupt-cells':
30eed1015cSSricharan R    description:
31eed1015cSSricharan R      Specifies the PIN numbers and Flags, as defined in defined in
32eed1015cSSricharan R      include/dt-bindings/interrupt-controller/irq.h
33eed1015cSSricharan R    const: 2
34eed1015cSSricharan R
35eed1015cSSricharan R  gpio-controller: true
36eed1015cSSricharan R
37eed1015cSSricharan R  '#gpio-cells':
38eed1015cSSricharan R    description: Specifying the pin number and flags, as defined in
39eed1015cSSricharan R      include/dt-bindings/gpio/gpio.h
40eed1015cSSricharan R    const: 2
41eed1015cSSricharan R
42eed1015cSSricharan R  gpio-ranges:
43eed1015cSSricharan R    maxItems: 1
44eed1015cSSricharan R
45eed1015cSSricharan R#PIN CONFIGURATION NODES
46eed1015cSSricharan RpatternProperties:
47eed1015cSSricharan R  '-pinmux$':
48eed1015cSSricharan R    type: object
49eed1015cSSricharan R    description:
50eed1015cSSricharan R      Pinctrl node's client devices use subnodes for desired pin configuration.
51eed1015cSSricharan R      Client device subnodes use below standard properties.
523d21a460SRob Herring    $ref: "/schemas/pinctrl/pincfg-node.yaml"
53eed1015cSSricharan R
54eed1015cSSricharan R    properties:
55eed1015cSSricharan R      pins:
56eed1015cSSricharan R        description:
57eed1015cSSricharan R          List of gpio pins affected by the properties specified in this
58eed1015cSSricharan R          subnode.
59eed1015cSSricharan R        items:
60eed1015cSSricharan R          oneOf:
61eed1015cSSricharan R            - pattern: "^gpio([1-9]|[1-7][0-9]|80)$"
62eed1015cSSricharan R            - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd,
63eed1015cSSricharan R                      sdc2_data, qdsd_cmd, qdsd_data0, qdsd_data1, qdsd_data2,
64eed1015cSSricharan R                      qdsd_data3 ]
65eed1015cSSricharan R        minItems: 1
66eed1015cSSricharan R        maxItems: 4
67eed1015cSSricharan R
68eed1015cSSricharan R      function:
69eed1015cSSricharan R        description:
70eed1015cSSricharan R          Specify the alternative function to be configured for the specified
71eed1015cSSricharan R          pins.
72eed1015cSSricharan R        enum: [ adsp_ext, alsp_int, atest_bbrx0, atest_bbrx1, atest_char,
73eed1015cSSricharan R                atest_char0, atest_char1, atest_char2, atest_char3, atest_combodac,
74eed1015cSSricharan R                atest_gpsadc0, atest_gpsadc1, atest_tsens, atest_wlan0,
75eed1015cSSricharan R                atest_wlan1, backlight_en, bimc_dte0, bimc_dte1, blsp1_i2c,
76eed1015cSSricharan R                blsp2_i2c, blsp3_i2c, blsp4_i2c, blsp5_i2c, blsp6_i2c, blsp1_spi,
77eed1015cSSricharan R                blsp1_spi_cs1, blsp1_spi_cs2, blsp1_spi_cs3, blsp2_spi,
78eed1015cSSricharan R                blsp2_spi_cs1, blsp2_spi_cs2, blsp2_spi_cs3, blsp3_spi,
79eed1015cSSricharan R                blsp3_spi_cs1, blsp3_spi_cs2, blsp3_spi_cs3, blsp4_spi, blsp5_spi,
80eed1015cSSricharan R                blsp6_spi, blsp1_uart, blsp2_uart, blsp1_uim, blsp2_uim, cam1_rst,
81eed1015cSSricharan R                cam1_standby, cam_mclk0, cam_mclk1, cci_async, cci_i2c, cci_timer0,
82eed1015cSSricharan R                cci_timer1, cci_timer2, cdc_pdm0, codec_mad, dbg_out, display_5v,
83eed1015cSSricharan R                dmic0_clk, dmic0_data, dsi_rst, ebi0_wrcdc, euro_us, ext_lpass,
84eed1015cSSricharan R                flash_strobe, gcc_gp1_clk_a, gcc_gp1_clk_b, gcc_gp2_clk_a,
85eed1015cSSricharan R                gcc_gp2_clk_b, gcc_gp3_clk_a, gcc_gp3_clk_b, gpio, gsm0_tx0,
86eed1015cSSricharan R                gsm0_tx1, gsm1_tx0, gsm1_tx1, gyro_accl, kpsns0, kpsns1, kpsns2,
87eed1015cSSricharan R                ldo_en, ldo_update, mag_int, mdp_vsync, modem_tsync, m_voc,
88eed1015cSSricharan R                nav_pps, nav_tsync, pa_indicator, pbs0, pbs1, pbs2, pri_mi2s,
89eed1015cSSricharan R                pri_mi2s_ws, prng_rosc, pwr_crypto_enabled_a, pwr_crypto_enabled_b,
90eed1015cSSricharan R                pwr_modem_enabled_a, pwr_modem_enabled_b, pwr_nav_enabled_a,
91eed1015cSSricharan R                pwr_nav_enabled_b, qdss_ctitrig_in_a0, qdss_ctitrig_in_a1,
92eed1015cSSricharan R                qdss_ctitrig_in_b0, qdss_ctitrig_in_b1, qdss_ctitrig_out_a0,
93eed1015cSSricharan R                qdss_ctitrig_out_a1, qdss_ctitrig_out_b0, qdss_ctitrig_out_b1,
94eed1015cSSricharan R                qdss_traceclk_a, qdss_traceclk_b, qdss_tracectl_a, qdss_tracectl_b,
95eed1015cSSricharan R                qdss_tracedata_a, qdss_tracedata_b, reset_n, sd_card, sd_write,
96eed1015cSSricharan R                sec_mi2s, smb_int, ssbi_wtr0, ssbi_wtr1, uim1, uim2, uim3,
97eed1015cSSricharan R                uim_batt, wcss_bt, wcss_fm, wcss_wlan, webcam1_rst ]
98eed1015cSSricharan R
99eed1015cSSricharan R      drive-strength:
100eed1015cSSricharan R        enum: [2, 4, 6, 8, 10, 12, 14, 16]
101eed1015cSSricharan R        default: 2
102eed1015cSSricharan R        description:
103eed1015cSSricharan R          Selects the drive strength for the specified pins, in mA.
104eed1015cSSricharan R
105eed1015cSSricharan R      bias-pull-down: true
106eed1015cSSricharan R
107eed1015cSSricharan R      bias-pull-up: true
108eed1015cSSricharan R
109eed1015cSSricharan R      bias-disable: true
110eed1015cSSricharan R
111eed1015cSSricharan R      output-high: true
112eed1015cSSricharan R
113eed1015cSSricharan R      output-low: true
114eed1015cSSricharan R
115eed1015cSSricharan R    required:
116eed1015cSSricharan R      - pins
117eed1015cSSricharan R      - function
118eed1015cSSricharan R
119eed1015cSSricharan R    additionalProperties: false
120eed1015cSSricharan R
121*c09acbc4SRafał MiłeckiallOf:
122*c09acbc4SRafał Miłecki  - $ref: "pinctrl.yaml#"
123*c09acbc4SRafał Miłecki
124eed1015cSSricharan Rrequired:
125eed1015cSSricharan R  - compatible
126eed1015cSSricharan R  - reg
127eed1015cSSricharan R  - interrupts
128eed1015cSSricharan R  - interrupt-controller
129eed1015cSSricharan R  - '#interrupt-cells'
130eed1015cSSricharan R  - gpio-controller
131eed1015cSSricharan R  - '#gpio-cells'
132eed1015cSSricharan R  - gpio-ranges
133eed1015cSSricharan R
134eed1015cSSricharan RadditionalProperties: false
135eed1015cSSricharan R
136eed1015cSSricharan Rexamples:
137eed1015cSSricharan R  - |
138eed1015cSSricharan R        #include <dt-bindings/interrupt-controller/arm-gic.h>
139eed1015cSSricharan R        tlmm: pinctrl@1000000 {
140eed1015cSSricharan R              compatible = "qcom,ipq6018-pinctrl";
141eed1015cSSricharan R              reg = <0x01000000 0x300000>;
142eed1015cSSricharan R              interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
143eed1015cSSricharan R              interrupt-controller;
144eed1015cSSricharan R              #interrupt-cells = <2>;
145eed1015cSSricharan R              gpio-controller;
146eed1015cSSricharan R              #gpio-cells = <2>;
147eed1015cSSricharan R              gpio-ranges = <&tlmm 0 80>;
148eed1015cSSricharan R
149eed1015cSSricharan R              serial3-pinmux {
150eed1015cSSricharan R                      pins = "gpio44", "gpio45";
151eed1015cSSricharan R                      function = "blsp2_uart";
152eed1015cSSricharan R                      drive-strength = <8>;
153eed1015cSSricharan R                      bias-pull-down;
154eed1015cSSricharan R              };
155eed1015cSSricharan R        };
156