xref: /linux/Documentation/devicetree/bindings/pinctrl/nvidia,tegra238-pinmux.yaml (revision 53c7db5c1916afcecc8683ae01ff8415c708a883)
1*9323f8a0SPrathamesh Shete# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*9323f8a0SPrathamesh Shete%YAML 1.2
3*9323f8a0SPrathamesh Shete---
4*9323f8a0SPrathamesh Shete$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra238-pinmux.yaml#
5*9323f8a0SPrathamesh Shete$schema: http://devicetree.org/meta-schemas/core.yaml#
6*9323f8a0SPrathamesh Shete
7*9323f8a0SPrathamesh Shetetitle: NVIDIA Tegra238 Pinmux Controller
8*9323f8a0SPrathamesh Shete
9*9323f8a0SPrathamesh Shetemaintainers:
10*9323f8a0SPrathamesh Shete  - Thierry Reding <thierry.reding@gmail.com>
11*9323f8a0SPrathamesh Shete  - Jon Hunter <jonathanh@nvidia.com>
12*9323f8a0SPrathamesh Shete
13*9323f8a0SPrathamesh Sheteproperties:
14*9323f8a0SPrathamesh Shete  compatible:
15*9323f8a0SPrathamesh Shete    const: nvidia,tegra238-pinmux
16*9323f8a0SPrathamesh Shete
17*9323f8a0SPrathamesh Shete  reg:
18*9323f8a0SPrathamesh Shete    maxItems: 1
19*9323f8a0SPrathamesh Shete
20*9323f8a0SPrathamesh ShetepatternProperties:
21*9323f8a0SPrathamesh Shete  "^pinmux(-[a-z0-9-]+)?$":
22*9323f8a0SPrathamesh Shete    type: object
23*9323f8a0SPrathamesh Shete
24*9323f8a0SPrathamesh Shete    # pin groups
25*9323f8a0SPrathamesh Shete    additionalProperties:
26*9323f8a0SPrathamesh Shete      $ref: nvidia,tegra238-pinmux-common.yaml
27*9323f8a0SPrathamesh Shete
28*9323f8a0SPrathamesh Shete      properties:
29*9323f8a0SPrathamesh Shete        nvidia,pins:
30*9323f8a0SPrathamesh Shete          items:
31*9323f8a0SPrathamesh Shete            enum: [ gpu_pwr_req_pa0, gp_pwm5_pa1, gp_pwm6_pa2, spi3_sck_pa3,
32*9323f8a0SPrathamesh Shete                    spi3_miso_pa4, spi3_mosi_pa5, spi3_cs0_pa6, spi3_cs1_pa7,
33*9323f8a0SPrathamesh Shete                    spi1_sck_pb0, spi1_miso_pb1, spi1_mosi_pb2, spi1_cs0_pb3,
34*9323f8a0SPrathamesh Shete                    spi1_cs1_pb4, pwr_i2c_scl_pc0, pwr_i2c_sda_pc1,
35*9323f8a0SPrathamesh Shete                    extperiph1_clk_pc2, extperiph2_clk_pc3, cam_i2c_scl_pc4,
36*9323f8a0SPrathamesh Shete                    cam_i2c_sda_pc5, soc_gpio23_pc6, soc_gpio24_pc7,
37*9323f8a0SPrathamesh Shete                    soc_gpio27_pd0, soc_gpio55_pd1, soc_gpio29_pd2,
38*9323f8a0SPrathamesh Shete                    soc_gpio33_pd3, soc_gpio32_pd4, soc_gpio35_pd5,
39*9323f8a0SPrathamesh Shete                    soc_gpio37_pd6, soc_gpio56_pd7, uart1_tx_pe0,
40*9323f8a0SPrathamesh Shete                    uart1_rx_pe1, uart1_rts_pe2, uart1_cts_pe3,
41*9323f8a0SPrathamesh Shete                    soc_gpio13_pf0, soc_gpio14_pf1, soc_gpio15_pf2,
42*9323f8a0SPrathamesh Shete                    soc_gpio16_pf3, soc_gpio17_pf4, soc_gpio18_pf5,
43*9323f8a0SPrathamesh Shete                    soc_gpio20_pf6, soc_gpio21_pf7, soc_gpio22_pg0,
44*9323f8a0SPrathamesh Shete                    soc_gpio06_pg1, uart4_tx_pg2, uart4_rx_pg3,
45*9323f8a0SPrathamesh Shete                    uart4_rts_pg4, uart4_cts_pg5, soc_gpio41_pg6,
46*9323f8a0SPrathamesh Shete                    soc_gpio42_pg7, soc_gpio43_ph0, soc_gpio44_ph1,
47*9323f8a0SPrathamesh Shete                    gen1_i2c_scl_ph2, gen1_i2c_sda_ph3, cpu_pwr_req_ph4,
48*9323f8a0SPrathamesh Shete                    soc_gpio07_ph5, dap3_clk_pj0, dap3_dout_pj1,
49*9323f8a0SPrathamesh Shete                    dap3_din_pj2, dap3_fs_pj3, soc_gpio57_pj4,
50*9323f8a0SPrathamesh Shete                    soc_gpio58_pj5, soc_gpio59_pj6, soc_gpio60_pj7,
51*9323f8a0SPrathamesh Shete                    soc_gpio45_pk0, soc_gpio46_pk1, soc_gpio47_pk2,
52*9323f8a0SPrathamesh Shete                    soc_gpio48_pk3, qspi0_sck_pl0, qspi0_io0_pl1,
53*9323f8a0SPrathamesh Shete                    qspi0_io1_pl2, qspi0_cs_n_pl3, soc_gpio152_pl4,
54*9323f8a0SPrathamesh Shete                    soc_gpio153_pl5, soc_gpio154_pl6, soc_gpio155_pl7,
55*9323f8a0SPrathamesh Shete                    soc_gpio156_pm0, soc_gpio157_pm1, soc_gpio158_pm2,
56*9323f8a0SPrathamesh Shete                    soc_gpio159_pm3, soc_gpio160_pm4, soc_gpio161_pm5,
57*9323f8a0SPrathamesh Shete                    soc_gpio162_pm6, uart7_tx_pm7, uart7_rx_pn0,
58*9323f8a0SPrathamesh Shete                    uart7_rts_pn1, uart7_cts_pn2, soc_gpio167_pp0,
59*9323f8a0SPrathamesh Shete                    soc_gpio168_pp1, soc_gpio169_pp2, soc_gpio170_pp3,
60*9323f8a0SPrathamesh Shete                    dap4_sclk_pp4, dap4_dout_pp5, dap4_din_pp6, dap4_fs_pp7,
61*9323f8a0SPrathamesh Shete                    soc_gpio171_pq0, soc_gpio172_pq1, soc_gpio173_pq2,
62*9323f8a0SPrathamesh Shete                    soc_gpio61_pr0, soc_gpio62_pr1, soc_gpio63_pr2,
63*9323f8a0SPrathamesh Shete                    soc_gpio64_pr3, soc_gpio65_pr4, soc_gpio66_pr5,
64*9323f8a0SPrathamesh Shete                    soc_gpio67_pr6, soc_gpio68_pr7, gen4_i2c_scl_ps0,
65*9323f8a0SPrathamesh Shete                    gen4_i2c_sda_ps1, soc_gpio75_ps2, gen7_i2c_scl_ps3,
66*9323f8a0SPrathamesh Shete                    gen7_i2c_sda_ps4, soc_gpio78_ps5, gen9_i2c_scl_ps6,
67*9323f8a0SPrathamesh Shete                    gen9_i2c_sda_ps7, soc_gpio81_pt0, soc_gpio36_pt1,
68*9323f8a0SPrathamesh Shete                    soc_gpio53_pt2, soc_gpio38_pt3, soc_gpio40_pt4,
69*9323f8a0SPrathamesh Shete                    soc_gpio34_pt5, usb_vbus_en0_pt6, usb_vbus_en1_pt7,
70*9323f8a0SPrathamesh Shete                    sdmmc1_clk_pu0, sdmmc1_cmd_pu1, sdmmc1_dat0_pu2,
71*9323f8a0SPrathamesh Shete                    sdmmc1_dat1_pu3, sdmmc1_dat2_pu4, sdmmc1_dat3_pu5,
72*9323f8a0SPrathamesh Shete                    ufs0_ref_clk_pv0, ufs0_rst_n_pv1, pex_l0_clkreq_n_pw0,
73*9323f8a0SPrathamesh Shete                    pex_l0_rst_n_pw1, pex_l1_clkreq_n_pw2,
74*9323f8a0SPrathamesh Shete                    pex_l1_rst_n_pw3, pex_l2_clkreq_n_pw4,
75*9323f8a0SPrathamesh Shete                    pex_l2_rst_n_pw5, pex_l3_clkreq_n_pw6,
76*9323f8a0SPrathamesh Shete                    pex_l3_rst_n_pw7, pex_wake_n_px0, dp_aux_ch0_hpd_px1,
77*9323f8a0SPrathamesh Shete                    bootv_ctl_n_paa0, soc_gpio00_paa1, vcomp_alert_paa2,
78*9323f8a0SPrathamesh Shete                    pwm1_paa3, batt_oc_paa4, soc_gpio04_paa5,
79*9323f8a0SPrathamesh Shete                    soc_gpio25_paa6, soc_gpio26_paa7, hdmi_cec_pbb0,
80*9323f8a0SPrathamesh Shete                    spi2_sck_pcc0, spi2_miso_pcc1, spi2_mosi_pcc2,
81*9323f8a0SPrathamesh Shete                    spi2_cs0_pcc3, spi2_cs1_pcc4, uart3_tx_pcc5,
82*9323f8a0SPrathamesh Shete                    uart3_rx_pcc6, gen2_i2c_scl_pcc7, gen2_i2c_sda_pdd0,
83*9323f8a0SPrathamesh Shete                    gen8_i2c_scl_pdd1, gen8_i2c_sda_pdd2, touch_clk_pdd3,
84*9323f8a0SPrathamesh Shete                    dmic1_clk_pdd4, dmic1_dat_pdd5, soc_gpio19_pdd6,
85*9323f8a0SPrathamesh Shete                    pwm2_pdd7, pwm3_pee0, pwm7_pee1, soc_gpio49_pee2,
86*9323f8a0SPrathamesh Shete                    soc_gpio82_pee3, soc_gpio50_pee4, soc_gpio83_pee5,
87*9323f8a0SPrathamesh Shete                    soc_gpio69_pff0, soc_gpio70_pff1, soc_gpio71_pff2,
88*9323f8a0SPrathamesh Shete                    soc_gpio72_pff3, soc_gpio73_pff4, soc_gpio74_pff5,
89*9323f8a0SPrathamesh Shete                    soc_gpio80_pff6, soc_gpio76_pff7, soc_gpio77_pgg0,
90*9323f8a0SPrathamesh Shete                    soc_gpio84_pgg1, uart2_tx_pgg2, uart2_rx_pgg3,
91*9323f8a0SPrathamesh Shete                    uart2_rts_pgg4, uart2_cts_pgg5, soc_gpio85_pgg6,
92*9323f8a0SPrathamesh Shete                    uart5_tx_pgg7, uart5_rx_phh0, uart5_rts_phh1,
93*9323f8a0SPrathamesh Shete                    uart5_cts_phh2, soc_gpio86_phh3, sdmmc1_comp,
94*9323f8a0SPrathamesh Shete                    # drive groups
95*9323f8a0SPrathamesh Shete                    drive_soc_gpio36_pt1, drive_soc_gpio53_pt2,
96*9323f8a0SPrathamesh Shete                    drive_soc_gpio38_pt3, drive_soc_gpio40_pt4,
97*9323f8a0SPrathamesh Shete                    drive_soc_gpio75_ps2, drive_soc_gpio81_pt0,
98*9323f8a0SPrathamesh Shete                    drive_soc_gpio78_ps5, drive_soc_gpio34_pt5,
99*9323f8a0SPrathamesh Shete                    drive_gen7_i2c_scl_ps3, drive_gen7_i2c_sda_ps4,
100*9323f8a0SPrathamesh Shete                    drive_gen4_i2c_sda_ps1, drive_gen4_i2c_scl_ps0,
101*9323f8a0SPrathamesh Shete                    drive_gen9_i2c_sda_ps7, drive_gen9_i2c_scl_ps6,
102*9323f8a0SPrathamesh Shete                    drive_usb_vbus_en0_pt6, drive_usb_vbus_en1_pt7,
103*9323f8a0SPrathamesh Shete                    drive_soc_gpio61_pr0, drive_soc_gpio62_pr1,
104*9323f8a0SPrathamesh Shete                    drive_soc_gpio63_pr2, drive_soc_gpio64_pr3,
105*9323f8a0SPrathamesh Shete                    drive_soc_gpio65_pr4, drive_soc_gpio66_pr5,
106*9323f8a0SPrathamesh Shete                    drive_soc_gpio67_pr6, drive_soc_gpio68_pr7,
107*9323f8a0SPrathamesh Shete                    drive_spi3_miso_pa4, drive_spi1_cs0_pb3,
108*9323f8a0SPrathamesh Shete                    drive_spi3_cs0_pa6, drive_spi1_miso_pb1,
109*9323f8a0SPrathamesh Shete                    drive_spi3_cs1_pa7, drive_spi1_sck_pb0,
110*9323f8a0SPrathamesh Shete                    drive_spi3_sck_pa3, drive_spi1_cs1_pb4,
111*9323f8a0SPrathamesh Shete                    drive_spi1_mosi_pb2, drive_spi3_mosi_pa5,
112*9323f8a0SPrathamesh Shete                    drive_gpu_pwr_req_pa0, drive_gp_pwm5_pa1,
113*9323f8a0SPrathamesh Shete                    drive_gp_pwm6_pa2, drive_extperiph2_clk_pc3,
114*9323f8a0SPrathamesh Shete                    drive_extperiph1_clk_pc2, drive_cam_i2c_sda_pc5,
115*9323f8a0SPrathamesh Shete                    drive_cam_i2c_scl_pc4, drive_soc_gpio23_pc6,
116*9323f8a0SPrathamesh Shete                    drive_soc_gpio24_pc7, drive_soc_gpio27_pd0,
117*9323f8a0SPrathamesh Shete                    drive_soc_gpio29_pd2, drive_soc_gpio32_pd4,
118*9323f8a0SPrathamesh Shete                    drive_soc_gpio33_pd3, drive_soc_gpio35_pd5,
119*9323f8a0SPrathamesh Shete                    drive_soc_gpio37_pd6, drive_soc_gpio56_pd7,
120*9323f8a0SPrathamesh Shete                    drive_soc_gpio55_pd1, drive_uart1_cts_pe3,
121*9323f8a0SPrathamesh Shete                    drive_uart1_rts_pe2, drive_uart1_rx_pe1,
122*9323f8a0SPrathamesh Shete                    drive_uart1_tx_pe0, drive_pwr_i2c_scl_pc0,
123*9323f8a0SPrathamesh Shete                    drive_pwr_i2c_sda_pc1, drive_cpu_pwr_req_ph4,
124*9323f8a0SPrathamesh Shete                    drive_uart4_cts_pg5, drive_uart4_rts_pg4,
125*9323f8a0SPrathamesh Shete                    drive_uart4_rx_pg3, drive_uart4_tx_pg2,
126*9323f8a0SPrathamesh Shete                    drive_gen1_i2c_scl_ph2, drive_gen1_i2c_sda_ph3,
127*9323f8a0SPrathamesh Shete                    drive_soc_gpio20_pf6, drive_soc_gpio21_pf7,
128*9323f8a0SPrathamesh Shete                    drive_soc_gpio22_pg0, drive_soc_gpio13_pf0,
129*9323f8a0SPrathamesh Shete                    drive_soc_gpio14_pf1, drive_soc_gpio15_pf2,
130*9323f8a0SPrathamesh Shete                    drive_soc_gpio16_pf3, drive_soc_gpio17_pf4,
131*9323f8a0SPrathamesh Shete                    drive_soc_gpio18_pf5, drive_soc_gpio41_pg6,
132*9323f8a0SPrathamesh Shete                    drive_soc_gpio42_pg7, drive_soc_gpio43_ph0,
133*9323f8a0SPrathamesh Shete                    drive_soc_gpio44_ph1, drive_soc_gpio06_pg1,
134*9323f8a0SPrathamesh Shete                    drive_soc_gpio07_ph5, drive_dap4_sclk_pp4,
135*9323f8a0SPrathamesh Shete                    drive_dap4_dout_pp5, drive_dap4_din_pp6,
136*9323f8a0SPrathamesh Shete                    drive_dap4_fs_pp7, drive_soc_gpio167_pp0,
137*9323f8a0SPrathamesh Shete                    drive_soc_gpio168_pp1, drive_soc_gpio169_pp2,
138*9323f8a0SPrathamesh Shete                    drive_soc_gpio170_pp3, drive_soc_gpio171_pq0,
139*9323f8a0SPrathamesh Shete                    drive_soc_gpio172_pq1, drive_soc_gpio173_pq2,
140*9323f8a0SPrathamesh Shete                    drive_soc_gpio45_pk0, drive_soc_gpio46_pk1,
141*9323f8a0SPrathamesh Shete                    drive_soc_gpio47_pk2, drive_soc_gpio48_pk3,
142*9323f8a0SPrathamesh Shete                    drive_soc_gpio57_pj4, drive_soc_gpio58_pj5,
143*9323f8a0SPrathamesh Shete                    drive_soc_gpio59_pj6, drive_soc_gpio60_pj7,
144*9323f8a0SPrathamesh Shete                    drive_dap3_fs_pj3, drive_dap3_clk_pj0,
145*9323f8a0SPrathamesh Shete                    drive_dap3_din_pj2, drive_dap3_dout_pj1,
146*9323f8a0SPrathamesh Shete                    drive_pex_l2_clkreq_n_pw4, drive_pex_wake_n_px0,
147*9323f8a0SPrathamesh Shete                    drive_pex_l1_clkreq_n_pw2, drive_pex_l1_rst_n_pw3,
148*9323f8a0SPrathamesh Shete                    drive_pex_l0_clkreq_n_pw0, drive_pex_l0_rst_n_pw1,
149*9323f8a0SPrathamesh Shete                    drive_pex_l2_rst_n_pw5, drive_pex_l3_clkreq_n_pw6,
150*9323f8a0SPrathamesh Shete                    drive_pex_l3_rst_n_pw7, drive_dp_aux_ch0_hpd_px1,
151*9323f8a0SPrathamesh Shete                    drive_qspi0_io0_pl1, drive_qspi0_io1_pl2,
152*9323f8a0SPrathamesh Shete                    drive_qspi0_sck_pl0, drive_qspi0_cs_n_pl3,
153*9323f8a0SPrathamesh Shete                    drive_soc_gpio156_pm0, drive_soc_gpio155_pl7,
154*9323f8a0SPrathamesh Shete                    drive_soc_gpio160_pm4, drive_soc_gpio154_pl6,
155*9323f8a0SPrathamesh Shete                    drive_soc_gpio152_pl4, drive_soc_gpio153_pl5,
156*9323f8a0SPrathamesh Shete                    drive_soc_gpio161_pm5, drive_soc_gpio162_pm6,
157*9323f8a0SPrathamesh Shete                    drive_soc_gpio159_pm3, drive_soc_gpio157_pm1,
158*9323f8a0SPrathamesh Shete                    drive_soc_gpio158_pm2, drive_uart7_cts_pn2,
159*9323f8a0SPrathamesh Shete                    drive_uart7_rts_pn1, drive_uart7_tx_pm7,
160*9323f8a0SPrathamesh Shete                    drive_uart7_rx_pn0, drive_sdmmc1_clk_pu0,
161*9323f8a0SPrathamesh Shete                    drive_sdmmc1_cmd_pu1, drive_sdmmc1_dat3_pu5,
162*9323f8a0SPrathamesh Shete                    drive_sdmmc1_dat2_pu4, drive_sdmmc1_dat1_pu3,
163*9323f8a0SPrathamesh Shete                    drive_sdmmc1_dat0_pu2, drive_ufs0_rst_n_pv1,
164*9323f8a0SPrathamesh Shete                    drive_ufs0_ref_clk_pv0, drive_batt_oc_paa4,
165*9323f8a0SPrathamesh Shete                    drive_bootv_ctl_n_paa0, drive_vcomp_alert_paa2,
166*9323f8a0SPrathamesh Shete                    drive_hdmi_cec_pbb0, drive_touch_clk_pdd3,
167*9323f8a0SPrathamesh Shete                    drive_uart3_rx_pcc6, drive_uart3_tx_pcc5,
168*9323f8a0SPrathamesh Shete                    drive_gen8_i2c_sda_pdd2, drive_gen8_i2c_scl_pdd1,
169*9323f8a0SPrathamesh Shete                    drive_spi2_mosi_pcc2, drive_gen2_i2c_scl_pcc7,
170*9323f8a0SPrathamesh Shete                    drive_spi2_cs0_pcc3, drive_gen2_i2c_sda_pdd0,
171*9323f8a0SPrathamesh Shete                    drive_spi2_sck_pcc0, drive_spi2_miso_pcc1,
172*9323f8a0SPrathamesh Shete                    drive_soc_gpio49_pee2, drive_soc_gpio50_pee4,
173*9323f8a0SPrathamesh Shete                    drive_soc_gpio82_pee3, drive_soc_gpio71_pff2,
174*9323f8a0SPrathamesh Shete                    drive_soc_gpio76_pff7, drive_soc_gpio74_pff5,
175*9323f8a0SPrathamesh Shete                    drive_soc_gpio00_paa1, drive_soc_gpio19_pdd6,
176*9323f8a0SPrathamesh Shete                    drive_soc_gpio86_phh3, drive_soc_gpio72_pff3,
177*9323f8a0SPrathamesh Shete                    drive_soc_gpio77_pgg0, drive_soc_gpio80_pff6,
178*9323f8a0SPrathamesh Shete                    drive_soc_gpio84_pgg1, drive_soc_gpio83_pee5,
179*9323f8a0SPrathamesh Shete                    drive_soc_gpio73_pff4, drive_soc_gpio70_pff1,
180*9323f8a0SPrathamesh Shete                    drive_soc_gpio04_paa5, drive_soc_gpio85_pgg6,
181*9323f8a0SPrathamesh Shete                    drive_soc_gpio69_pff0, drive_soc_gpio25_paa6,
182*9323f8a0SPrathamesh Shete                    drive_soc_gpio26_paa7, drive_uart5_tx_pgg7,
183*9323f8a0SPrathamesh Shete                    drive_uart5_rx_phh0, drive_uart2_tx_pgg2,
184*9323f8a0SPrathamesh Shete                    drive_uart2_rx_pgg3, drive_uart2_cts_pgg5,
185*9323f8a0SPrathamesh Shete                    drive_uart2_rts_pgg4, drive_uart5_cts_phh2,
186*9323f8a0SPrathamesh Shete                    drive_uart5_rts_phh1, drive_pwm7_pee1,
187*9323f8a0SPrathamesh Shete                    drive_pwm2_pdd7, drive_pwm3_pee0, drive_pwm1_paa3,
188*9323f8a0SPrathamesh Shete                    drive_spi2_cs1_pcc4, drive_dmic1_clk_pdd4,
189*9323f8a0SPrathamesh Shete                    drive_dmic1_dat_pdd5, drive_sdmmc1_comp ]
190*9323f8a0SPrathamesh Shete
191*9323f8a0SPrathamesh Sheterequired:
192*9323f8a0SPrathamesh Shete  - compatible
193*9323f8a0SPrathamesh Shete  - reg
194*9323f8a0SPrathamesh Shete
195*9323f8a0SPrathamesh SheteadditionalProperties: false
196*9323f8a0SPrathamesh Shete
197*9323f8a0SPrathamesh Sheteexamples:
198*9323f8a0SPrathamesh Shete  - |
199*9323f8a0SPrathamesh Shete    #include <dt-bindings/pinctrl/pinctrl-tegra.h>
200*9323f8a0SPrathamesh Shete
201*9323f8a0SPrathamesh Shete    pinmux@2430000 {
202*9323f8a0SPrathamesh Shete        compatible = "nvidia,tegra238-pinmux";
203*9323f8a0SPrathamesh Shete        reg = <0x2430000 0x17000>;
204*9323f8a0SPrathamesh Shete
205*9323f8a0SPrathamesh Shete        pinctrl-names = "pex_rst";
206*9323f8a0SPrathamesh Shete        pinctrl-0 = <&pex_rst_c5_out_state>;
207*9323f8a0SPrathamesh Shete
208*9323f8a0SPrathamesh Shete        pex_rst_c5_out_state: pinmux-pex-rst-c5-out {
209*9323f8a0SPrathamesh Shete            pexrst {
210*9323f8a0SPrathamesh Shete                nvidia,pins = "pex_l3_rst_n_pw7";
211*9323f8a0SPrathamesh Shete                nvidia,schmitt = <TEGRA_PIN_DISABLE>;
212*9323f8a0SPrathamesh Shete                nvidia,enable-input = <TEGRA_PIN_DISABLE>;
213*9323f8a0SPrathamesh Shete                nvidia,io-hv = <TEGRA_PIN_ENABLE>;
214*9323f8a0SPrathamesh Shete                nvidia,tristate = <TEGRA_PIN_DISABLE>;
215*9323f8a0SPrathamesh Shete                nvidia,pull = <TEGRA_PIN_PULL_NONE>;
216*9323f8a0SPrathamesh Shete            };
217*9323f8a0SPrathamesh Shete        };
218*9323f8a0SPrathamesh Shete    };
219*9323f8a0SPrathamesh Shete...
220