130a9d516SPrathamesh Shete# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 230a9d516SPrathamesh Shete%YAML 1.2 330a9d516SPrathamesh Shete--- 430a9d516SPrathamesh Shete$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra264-pinmux-main.yaml# 530a9d516SPrathamesh Shete$schema: http://devicetree.org/meta-schemas/core.yaml# 630a9d516SPrathamesh Shete 730a9d516SPrathamesh Shetetitle: NVIDIA Tegra264 Main Pinmux Controller 830a9d516SPrathamesh Shete 930a9d516SPrathamesh Shetemaintainers: 1030a9d516SPrathamesh Shete - Thierry Reding <thierry.reding@gmail.com> 1130a9d516SPrathamesh Shete - Jon Hunter <jonathanh@nvidia.com> 1230a9d516SPrathamesh Shete 1330a9d516SPrathamesh Sheteproperties: 1430a9d516SPrathamesh Shete compatible: 1530a9d516SPrathamesh Shete const: nvidia,tegra264-pinmux-main 1630a9d516SPrathamesh Shete 1730a9d516SPrathamesh Shete reg: 1830a9d516SPrathamesh Shete maxItems: 1 1930a9d516SPrathamesh Shete 2030a9d516SPrathamesh ShetepatternProperties: 2130a9d516SPrathamesh Shete "^pinmux(-[a-z0-9-]+)?$": 2230a9d516SPrathamesh Shete type: object 2330a9d516SPrathamesh Shete 2430a9d516SPrathamesh Shete # pin groups 2530a9d516SPrathamesh Shete additionalProperties: 2630a9d516SPrathamesh Shete $ref: nvidia,tegra264-pinmux-common.yaml 2730a9d516SPrathamesh Shete 2830a9d516SPrathamesh Shete properties: 2930a9d516SPrathamesh Shete nvidia,pins: 3030a9d516SPrathamesh Shete items: 3130a9d516SPrathamesh Shete enum: [ pwm1_pa0, pwm6_pa1, pwm7_pa2, pwm8_pa3, ufs0_ref_clk_pa4, 3230a9d516SPrathamesh Shete ufs0_rst_n_pa5, soc_gpio250_pf0, soc_gpio251_pf1, 3330a9d516SPrathamesh Shete soc_gpio252_pf2, dp_aux_ch0_hpd_pf3, dp_aux_ch1_hpd_pf4, 3430a9d516SPrathamesh Shete dp_aux_ch2_hpd_pf5, dp_aux_ch3_hpd_pf6, pwm2_pf7, pwm3_pg0, 3530a9d516SPrathamesh Shete gen7_i2c_scl_pg1, gen7_i2c_sda_pg2, gen9_i2c_scl_pg3, 3630a9d516SPrathamesh Shete gen9_i2c_sda_pg4, sdmmc1_clk_px0, sdmmc1_cmd_px1, 3730a9d516SPrathamesh Shete sdmmc1_dat0_px2, sdmmc1_dat1_px3, sdmmc1_dat2_px4, 3830a9d516SPrathamesh Shete sdmmc1_dat3_px5, sdmmc1_comp, soc_gpio124_pl0, 3930a9d516SPrathamesh Shete soc_gpio125_pl1, fan_tach0_pl2, soc_gpio127_pl3, 4030a9d516SPrathamesh Shete soc_gpio128_pl4, soc_gpio129_pl5, soc_gpio130_pl6, 4130a9d516SPrathamesh Shete soc_gpio131_pl7, gp_pwm9_pm0, soc_gpio133_pm1, uart9_tx_pm2, 4230a9d516SPrathamesh Shete uart9_rx_pm3, uart9_rts_n_pm4, uart9_cts_n_pm5, 4330a9d516SPrathamesh Shete soc_gpio170_pu0, soc_gpio171_pu1, soc_gpio172_pu2, 4430a9d516SPrathamesh Shete soc_gpio173_pu3, soc_gpio174_pu4, soc_gpio175_pu5, 4530a9d516SPrathamesh Shete soc_gpio176_pu6, soc_gpio177_pu7, soc_gpio178_pv0, 4630a9d516SPrathamesh Shete pwm10_pv1, uart4_tx_pv2, uart4_rx_pv3, uart4_rts_n_pv4, 47*77abd038SPrathamesh Shete uart4_cts_n_pv5, dap2_clk_pv6, dap2_din_pw0, dap2_dout_pv7, 4830a9d516SPrathamesh Shete dap2_fs_pw1, gen1_i2c_scl_pw2, gen1_i2c_sda_pw3, 4930a9d516SPrathamesh Shete gen0_i2c_scl_pw4, gen0_i2c_sda_pw5, pwr_i2c_scl_pw6, 5030a9d516SPrathamesh Shete pwr_i2c_sda_pw7, soc_gpio138_pp0, soc_gpio139_pp1, 5130a9d516SPrathamesh Shete dap6_sclk_pp2, dap6_dout_pp3, dap6_din_pp4, dap6_fs_pp5, 5230a9d516SPrathamesh Shete dap4_sclk_pp6, dap4_dout_pp7, dap4_din_pq0, dap4_fs_pq1, 5330a9d516SPrathamesh Shete spi5_sck_pq2, spi5_miso_pq3, spi5_mosi_pq4, spi5_cs0_pq5, 5430a9d516SPrathamesh Shete soc_gpio152_pq6, soc_gpio153_pq7, aud_mclk_pr0, 5530a9d516SPrathamesh Shete soc_gpio155_pr1, dap1_sclk_pr2, dap1_out_pr3, dap1_in_pr4, 5630a9d516SPrathamesh Shete dap1_fs_pr5, gen11_i2c_scl_pr6, gen11_i2c_sda_pr7, 5730a9d516SPrathamesh Shete soc_gpio350_ps0, soc_gpio351_ps1, qspi0_sck_pt0, 5830a9d516SPrathamesh Shete qspi0_cs_n_pt1, qspi0_io0_pt2, qspi0_io1_pt3, qspi0_io2_pt4, 5930a9d516SPrathamesh Shete qspi0_io3_pt5, soc_gpio192_pt6, soc_gpio270_py0, 6030a9d516SPrathamesh Shete soc_gpio271_py1, soc_gpio272_py2, soc_gpio273_py3, 6130a9d516SPrathamesh Shete soc_gpio274_py4, soc_gpio275_py5, soc_gpio276_py6, 6230a9d516SPrathamesh Shete soc_gpio277_py7, soc_gpio278_pz0, soc_gpio279_pz1, 6330a9d516SPrathamesh Shete xhalt_trig_pz2, soc_gpio281_pz3, soc_gpio282_pz4, 6430a9d516SPrathamesh Shete soc_gpio283_pz5, soc_gpio284_pz6, soc_gpio285_pz7, 6530a9d516SPrathamesh Shete soc_gpio286_pal0, soc_gpio287_pal1, soc_gpio288_pal2, 6630a9d516SPrathamesh Shete cpu_pwr_req_ph0, gpu_pwr_req_ph1, uart10_tx_ph2, 6730a9d516SPrathamesh Shete uart10_rx_ph3, uart10_rts_n_ph4, uart10_cts_n_ph5, 6830a9d516SPrathamesh Shete spi3_sck_ph6, spi3_miso_ph7, spi3_mosi_pj0, spi3_cs0_pj1, 6930a9d516SPrathamesh Shete spi3_cs3_pj2, uart5_tx_pj3, uart5_rx_pj4, uart5_rts_n_pj5, 7030a9d516SPrathamesh Shete uart5_cts_n_pj6, spi1_sck_pj7, spi1_miso_pk0, spi1_mosi_pk1, 7130a9d516SPrathamesh Shete spi1_cs0_pk2, spi1_cs1_pk3, extperiph1_clk_pk4, 7230a9d516SPrathamesh Shete extperiph2_clk_pk5, gen12_i2c_scl_pk6, gen12_i2c_sda_pk7, 7330a9d516SPrathamesh Shete drive_cpu_pwr_req_ph0, drive_gpu_pwr_req_ph1, 7430a9d516SPrathamesh Shete drive_uart10_cts_n_ph5, drive_uart10_rts_n_ph4, 7530a9d516SPrathamesh Shete drive_uart10_rx_ph3, drive_uart10_tx_ph2, 7630a9d516SPrathamesh Shete drive_spi3_cs0_pj1, drive_spi3_cs3_pj2, 7730a9d516SPrathamesh Shete drive_spi3_miso_ph7, drive_spi3_mosi_pj0, 7830a9d516SPrathamesh Shete drive_spi3_sck_ph6, drive_uart5_cts_n_pj6, 7930a9d516SPrathamesh Shete drive_uart5_rts_n_pj5, drive_uart5_rx_pj4, 8030a9d516SPrathamesh Shete drive_uart5_tx_pj3, drive_spi1_cs0_pk2, 8130a9d516SPrathamesh Shete drive_spi1_cs1_pk3, drive_spi1_miso_pk0, 8230a9d516SPrathamesh Shete drive_spi1_mosi_pk1, drive_spi1_sck_pj7, 8330a9d516SPrathamesh Shete drive_extperiph2_clk_pk5, drive_extperiph1_clk_pk4, 8430a9d516SPrathamesh Shete drive_gen12_i2c_scl_pk6, drive_gen12_i2c_sda_pk7, 8530a9d516SPrathamesh Shete drive_soc_gpio124_pl0, drive_soc_gpio125_pl1, 8630a9d516SPrathamesh Shete drive_fan_tach0_pl2, drive_soc_gpio127_pl3, 8730a9d516SPrathamesh Shete drive_soc_gpio128_pl4, drive_soc_gpio129_pl5, 8830a9d516SPrathamesh Shete drive_soc_gpio130_pl6, drive_soc_gpio131_pl7, 8930a9d516SPrathamesh Shete drive_gp_pwm9_pm0, drive_soc_gpio133_pm1, 9030a9d516SPrathamesh Shete drive_uart9_cts_n_pm5, drive_uart9_rts_n_pm4, 9130a9d516SPrathamesh Shete drive_uart9_rx_pm3, drive_uart9_tx_pm2, 9230a9d516SPrathamesh Shete drive_sdmmc1_clk_px0, drive_sdmmc1_cmd_px1, 9330a9d516SPrathamesh Shete drive_sdmmc1_dat3_px5, drive_sdmmc1_dat2_px4, 9430a9d516SPrathamesh Shete drive_sdmmc1_dat1_px3, drive_sdmmc1_dat0_px2, 9530a9d516SPrathamesh Shete drive_qspi0_cs_n_pt1, drive_qspi0_io0_pt2, 9630a9d516SPrathamesh Shete drive_qspi0_io1_pt3, drive_qspi0_io2_pt4, 9730a9d516SPrathamesh Shete drive_qspi0_io3_pt5, drive_qspi0_sck_pt0, 9830a9d516SPrathamesh Shete drive_soc_gpio192_pt6, drive_soc_gpio138_pp0, 9930a9d516SPrathamesh Shete drive_soc_gpio139_pp1, drive_dap6_din_pp4, 10030a9d516SPrathamesh Shete drive_dap6_dout_pp3, drive_dap6_fs_pp5, 10130a9d516SPrathamesh Shete drive_dap6_sclk_pp2, drive_dap4_dout_pp7, 10230a9d516SPrathamesh Shete drive_dap4_sclk_pp6, drive_dap4_din_pq0, 10330a9d516SPrathamesh Shete drive_dap4_fs_pq1, drive_spi5_cs0_pq5, 10430a9d516SPrathamesh Shete drive_spi5_miso_pq3, drive_spi5_mosi_pq4, 10530a9d516SPrathamesh Shete drive_spi5_sck_pq2, drive_soc_gpio152_pq6, 10630a9d516SPrathamesh Shete drive_soc_gpio153_pq7, drive_soc_gpio155_pr1, 10730a9d516SPrathamesh Shete drive_aud_mclk_pr0, drive_dap1_sclk_pr2, 10830a9d516SPrathamesh Shete drive_dap1_in_pr4, drive_dap1_out_pr3, 10930a9d516SPrathamesh Shete drive_dap1_fs_pr5, drive_gen11_i2c_scl_pr6, 11030a9d516SPrathamesh Shete drive_gen11_i2c_sda_pr7, drive_soc_gpio350_ps0, 11130a9d516SPrathamesh Shete drive_soc_gpio351_ps1, drive_gen0_i2c_scl_pw4, 11230a9d516SPrathamesh Shete drive_gen0_i2c_sda_pw5, drive_gen1_i2c_scl_pw2, 11330a9d516SPrathamesh Shete drive_gen1_i2c_sda_pw3, drive_dap2_fs_pw1, 114*77abd038SPrathamesh Shete drive_dap2_clk_pv6, drive_dap2_din_pw0, 115*77abd038SPrathamesh Shete drive_dap2_dout_pv7, drive_pwm10_pv1, 11630a9d516SPrathamesh Shete drive_soc_gpio170_pu0, drive_soc_gpio171_pu1, 11730a9d516SPrathamesh Shete drive_soc_gpio172_pu2, drive_soc_gpio173_pu3, 11830a9d516SPrathamesh Shete drive_soc_gpio174_pu4, drive_soc_gpio175_pu5, 11930a9d516SPrathamesh Shete drive_soc_gpio176_pu6, drive_soc_gpio177_pu7, 12030a9d516SPrathamesh Shete drive_soc_gpio178_pv0, drive_uart4_cts_n_pv5, 12130a9d516SPrathamesh Shete drive_uart4_rts_n_pv4, drive_uart4_rx_pv3, 12230a9d516SPrathamesh Shete drive_uart4_tx_pv2, drive_pwr_i2c_sda_pw7, 12330a9d516SPrathamesh Shete drive_pwr_i2c_scl_pw6, drive_soc_gpio250_pf0, 12430a9d516SPrathamesh Shete drive_soc_gpio251_pf1, drive_soc_gpio252_pf2, 12530a9d516SPrathamesh Shete drive_dp_aux_ch0_hpd_pf3, drive_dp_aux_ch1_hpd_pf4, 12630a9d516SPrathamesh Shete drive_dp_aux_ch2_hpd_pf5, drive_dp_aux_ch3_hpd_pf6, 12730a9d516SPrathamesh Shete drive_pwm2_pf7, drive_pwm3_pg0, 12830a9d516SPrathamesh Shete drive_gen7_i2c_scl_pg1, drive_gen7_i2c_sda_pg2, 12930a9d516SPrathamesh Shete drive_gen9_i2c_scl_pg3, drive_gen9_i2c_sda_pg4, 13030a9d516SPrathamesh Shete drive_soc_gpio270_py0, drive_soc_gpio271_py1, 13130a9d516SPrathamesh Shete drive_soc_gpio272_py2, drive_soc_gpio273_py3, 13230a9d516SPrathamesh Shete drive_soc_gpio274_py4, drive_soc_gpio275_py5, 13330a9d516SPrathamesh Shete drive_soc_gpio276_py6, drive_soc_gpio277_py7, 13430a9d516SPrathamesh Shete drive_soc_gpio278_pz0, drive_soc_gpio279_pz1, 13530a9d516SPrathamesh Shete drive_soc_gpio282_pz4, drive_soc_gpio283_pz5, 13630a9d516SPrathamesh Shete drive_soc_gpio284_pz6, drive_soc_gpio285_pz7, 13730a9d516SPrathamesh Shete drive_soc_gpio286_pal0, drive_soc_gpio287_pal1, 13830a9d516SPrathamesh Shete drive_soc_gpio288_pal2, drive_xhalt_trig_pz2, 13930a9d516SPrathamesh Shete drive_soc_gpio281_pz3 ] 14030a9d516SPrathamesh Shete 14130a9d516SPrathamesh Sheterequired: 14230a9d516SPrathamesh Shete - compatible 14330a9d516SPrathamesh Shete - reg 14430a9d516SPrathamesh Shete 14530a9d516SPrathamesh SheteadditionalProperties: false 14630a9d516SPrathamesh Shete 14730a9d516SPrathamesh Sheteexamples: 14830a9d516SPrathamesh Shete - | 14930a9d516SPrathamesh Shete #include <dt-bindings/pinctrl/pinctrl-tegra.h> 15030a9d516SPrathamesh Shete 15130a9d516SPrathamesh Shete pinmux@c281000 { 15230a9d516SPrathamesh Shete compatible = "nvidia,tegra264-pinmux-main"; 15330a9d516SPrathamesh Shete reg = <0xc281000 0xc000>; 15430a9d516SPrathamesh Shete 15530a9d516SPrathamesh Shete pinctrl-names = "default"; 15630a9d516SPrathamesh Shete pinctrl-0 = <&state_default>; 15730a9d516SPrathamesh Shete 15830a9d516SPrathamesh Shete state_default: pinmux-default { 15930a9d516SPrathamesh Shete sdmmc1 { 16030a9d516SPrathamesh Shete nvidia,pins = "sdmmc1_clk_px0"; 16130a9d516SPrathamesh Shete nvidia,function = "sdmmc1_cd"; 16230a9d516SPrathamesh Shete nvidia,pull = <TEGRA_PIN_PULL_NONE>; 16330a9d516SPrathamesh Shete nvidia,tristate = <TEGRA_PIN_DISABLE>; 16430a9d516SPrathamesh Shete nvidia,enable-input = <TEGRA_PIN_ENABLE>; 16530a9d516SPrathamesh Shete }; 16630a9d516SPrathamesh Shete }; 16730a9d516SPrathamesh Shete }; 168