xref: /linux/Documentation/devicetree/bindings/pinctrl/nuvoton,npcm7xx-pinctrl.txt (revision 0898782247ae533d1f4e47a06bc5d4870931b284)
1*d0e4e8f0STomer MaimonNuvoton NPCM7XX Pin Controllers
2*d0e4e8f0STomer Maimon
3*d0e4e8f0STomer MaimonThe Nuvoton BMC NPCM7XX Pin Controller multi-function routed through
4*d0e4e8f0STomer Maimonthe multiplexing block, Each pin supports GPIO functionality (GPIOx)
5*d0e4e8f0STomer Maimonand multiple functions that directly connect the pin to different
6*d0e4e8f0STomer Maimonhardware blocks.
7*d0e4e8f0STomer Maimon
8*d0e4e8f0STomer MaimonRequired properties:
9*d0e4e8f0STomer Maimon- #address-cells : should be 1.
10*d0e4e8f0STomer Maimon- #size-cells	 : should be 1.
11*d0e4e8f0STomer Maimon- compatible	 : "nuvoton,npcm750-pinctrl" for Poleg NPCM7XX.
12*d0e4e8f0STomer Maimon- ranges	 : defines mapping ranges between pin controller node (parent)
13*d0e4e8f0STomer Maimon			to GPIO bank node (children).
14*d0e4e8f0STomer Maimon
15*d0e4e8f0STomer Maimon=== GPIO Bank Subnode ===
16*d0e4e8f0STomer Maimon
17*d0e4e8f0STomer MaimonThe NPCM7XX has 8 GPIO Banks each GPIO bank supports 32 GPIO.
18*d0e4e8f0STomer Maimon
19*d0e4e8f0STomer MaimonRequired GPIO Bank subnode-properties:
20*d0e4e8f0STomer Maimon- reg 			: specifies physical base address and size of the GPIO
21*d0e4e8f0STomer Maimon				bank registers.
22*d0e4e8f0STomer Maimon- gpio-controller	: Marks the device node as a GPIO controller.
23*d0e4e8f0STomer Maimon- #gpio-cells		: Must be <2>. The first cell is the gpio pin number
24*d0e4e8f0STomer Maimon				and the second cell is used for optional parameters.
25*d0e4e8f0STomer Maimon- interrupts		: contain the GPIO bank interrupt with flags for falling edge.
26*d0e4e8f0STomer Maimon- gpio-ranges		: defines the range of pins managed by the GPIO bank controller.
27*d0e4e8f0STomer Maimon
28*d0e4e8f0STomer MaimonFor example, GPIO bank subnodes like the following:
29*d0e4e8f0STomer Maimon	gpio0: gpio@f0010000 {
30*d0e4e8f0STomer Maimon		gpio-controller;
31*d0e4e8f0STomer Maimon		#gpio-cells = <2>;
32*d0e4e8f0STomer Maimon		reg = <0x0 0x80>;
33*d0e4e8f0STomer Maimon		interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
34*d0e4e8f0STomer Maimon		gpio-ranges = <&pinctrl 0 0 32>;
35*d0e4e8f0STomer Maimon	};
36*d0e4e8f0STomer Maimon
37*d0e4e8f0STomer Maimon=== Pin Mux Subnode ===
38*d0e4e8f0STomer Maimon
39*d0e4e8f0STomer Maimon- pin: A string containing the name of the pin
40*d0e4e8f0STomer Maimon	An array of strings, each string containing the name of a pin.
41*d0e4e8f0STomer Maimon	These pin are used for selecting pin configuration.
42*d0e4e8f0STomer Maimon
43*d0e4e8f0STomer MaimonThe following are the list of pins available:
44*d0e4e8f0STomer Maimon	"GPIO0/IOX1DI", "GPIO1/IOX1LD",	"GPIO2/IOX1CK", "GPIO3/IOX1D0",
45*d0e4e8f0STomer Maimon	"GPIO4/IOX2DI/SMB1DSDA", "GPIO5/IOX2LD/SMB1DSCL", "GPIO6/IOX2CK/SMB2DSDA",
46*d0e4e8f0STomer Maimon	"GPIO7/IOX2D0/SMB2DSCL", "GPIO8/LKGPO1", "GPIO9/LKGPO2", "GPIO10/IOXHLD",
47*d0e4e8f0STomer Maimon	"GPIO11/IOXHCK", "GPIO12/GSPICK/SMB5BSCL", "GPIO13/GSPIDO/SMB5BSDA",
48*d0e4e8f0STomer Maimon	"GPIO14/GSPIDI/SMB5CSCL", "GPIO15/GSPICS/SMB5CSDA", "GPIO16/LKGPO0",
49*d0e4e8f0STomer Maimon	"GPIO17/PSPI2DI/SMB4DEN","GPIO18/PSPI2D0/SMB4BSDA", "GPIO19/PSPI2CK/SMB4BSCL",
50*d0e4e8f0STomer Maimon	"GPIO20/SMB4CSDA/SMB15SDA", "GPIO21/SMB4CSCL/SMB15SCL", "GPIO22/SMB4DSDA/SMB14SDA",
51*d0e4e8f0STomer Maimon	"GPIO23/SMB4DSCL/SMB14SCL", "GPIO24/IOXHDO", "GPIO25/IOXHDI", "GPIO26/SMB5SDA",
52*d0e4e8f0STomer Maimon	"GPIO27/SMB5SCL", "GPIO28/SMB4SDA", "GPIO29/SMB4SCL", "GPIO30/SMB3SDA",
53*d0e4e8f0STomer Maimon	"GPIO31/SMB3SCL", "GPIO32/nSPI0CS1","SPI0D2", "SPI0D3", "GPIO37/SMB3CSDA",
54*d0e4e8f0STomer Maimon	"GPIO38/SMB3CSCL", "GPIO39/SMB3BSDA", "GPIO40/SMB3BSCL", "GPIO41/BSPRXD",
55*d0e4e8f0STomer Maimon	"GPO42/BSPTXD/STRAP11", "GPIO43/RXD1/JTMS2/BU1RXD", "GPIO44/nCTS1/JTDI2/BU1CTS",
56*d0e4e8f0STomer Maimon	"GPIO45/nDCD1/JTDO2", "GPIO46/nDSR1/JTCK2", "GPIO47/nRI1/JCP_RDY2",
57*d0e4e8f0STomer Maimon	"GPIO48/TXD2/BSPTXD", "GPIO49/RXD2/BSPRXD", "GPIO50/nCTS2", "GPO51/nRTS2/STRAP2",
58*d0e4e8f0STomer Maimon	"GPIO52/nDCD2", "GPO53/nDTR2_BOUT2/STRAP1", "GPIO54/nDSR2", "GPIO55/nRI2",
59*d0e4e8f0STomer Maimon	"GPIO56/R1RXERR", "GPIO57/R1MDC", "GPIO58/R1MDIO", "GPIO59/SMB3DSDA",
60*d0e4e8f0STomer Maimon	"GPIO60/SMB3DSCL", "GPO61/nDTR1_BOUT1/STRAP6", "GPO62/nRTST1/STRAP5",
61*d0e4e8f0STomer Maimon	"GPO63/TXD1/STRAP4", "GPIO64/FANIN0", "GPIO65/FANIN1", "GPIO66/FANIN2",
62*d0e4e8f0STomer Maimon	"GPIO67/FANIN3", "GPIO68/FANIN4", "GPIO69/FANIN5", "GPIO70/FANIN6", "GPIO71/FANIN7",
63*d0e4e8f0STomer Maimon	"GPIO72/FANIN8", "GPIO73/FANIN9", "GPIO74/FANIN10", "GPIO75/FANIN11",
64*d0e4e8f0STomer Maimon	"GPIO76/FANIN12", "GPIO77/FANIN13","GPIO78/FANIN14", "GPIO79/FANIN15",
65*d0e4e8f0STomer Maimon	"GPIO80/PWM0", "GPIO81/PWM1", "GPIO82/PWM2", "GPIO83/PWM3", "GPIO84/R2TXD0",
66*d0e4e8f0STomer Maimon	"GPIO85/R2TXD1", "GPIO86/R2TXEN", "GPIO87/R2RXD0", "GPIO88/R2RXD1", "GPIO89/R2CRSDV",
67*d0e4e8f0STomer Maimon	"GPIO90/R2RXERR", "GPIO91/R2MDC", "GPIO92/R2MDIO", "GPIO93/GA20/SMB5DSCL",
68*d0e4e8f0STomer Maimon	"GPIO94/nKBRST/SMB5DSDA", "GPIO95/nLRESET/nESPIRST", "GPIO96/RG1TXD0",
69*d0e4e8f0STomer Maimon	"GPIO97/RG1TXD1", "GPIO98/RG1TXD2", "GPIO99/RG1TXD3","GPIO100/RG1TXC",
70*d0e4e8f0STomer Maimon	"GPIO101/RG1TXCTL", "GPIO102/RG1RXD0", "GPIO103/RG1RXD1", "GPIO104/RG1RXD2",
71*d0e4e8f0STomer Maimon	"GPIO105/RG1RXD3", "GPIO106/RG1RXC", "GPIO107/RG1RXCTL", "GPIO108/RG1MDC",
72*d0e4e8f0STomer Maimon	"GPIO109/RG1MDIO", "GPIO110/RG2TXD0/DDRV0", "GPIO111/RG2TXD1/DDRV1",
73*d0e4e8f0STomer Maimon	"GPIO112/RG2TXD2/DDRV2", "GPIO113/RG2TXD3/DDRV3", "GPIO114/SMB0SCL",
74*d0e4e8f0STomer Maimon	"GPIO115/SMB0SDA", "GPIO116/SMB1SCL", "GPIO117/SMB1SDA", "GPIO118/SMB2SCL",
75*d0e4e8f0STomer Maimon	"GPIO119/SMB2SDA", "GPIO120/SMB2CSDA", "GPIO121/SMB2CSCL", "GPIO122/SMB2BSDA",
76*d0e4e8f0STomer Maimon	"GPIO123/SMB2BSCL", "GPIO124/SMB1CSDA", "GPIO125/SMB1CSCL","GPIO126/SMB1BSDA",
77*d0e4e8f0STomer Maimon	"GPIO127/SMB1BSCL", "GPIO128/SMB8SCL", "GPIO129/SMB8SDA", "GPIO130/SMB9SCL",
78*d0e4e8f0STomer Maimon	"GPIO131/SMB9SDA", "GPIO132/SMB10SCL", "GPIO133/SMB10SDA","GPIO134/SMB11SCL",
79*d0e4e8f0STomer Maimon	"GPIO135/SMB11SDA", "GPIO136/SD1DT0", "GPIO137/SD1DT1", "GPIO138/SD1DT2",
80*d0e4e8f0STomer Maimon	"GPIO139/SD1DT3", "GPIO140/SD1CLK", "GPIO141/SD1WP", "GPIO142/SD1CMD",
81*d0e4e8f0STomer Maimon	"GPIO143/SD1CD/SD1PWR", "GPIO144/PWM4",	"GPIO145/PWM5",	"GPIO146/PWM6",
82*d0e4e8f0STomer Maimon	"GPIO147/PWM7",	"GPIO148/MMCDT4", "GPIO149/MMCDT5", "GPIO150/MMCDT6",
83*d0e4e8f0STomer Maimon	"GPIO151/MMCDT7", "GPIO152/MMCCLK", "GPIO153/MMCWP", "GPIO154/MMCCMD",
84*d0e4e8f0STomer Maimon	"GPIO155/nMMCCD/nMMCRST", "GPIO156/MMCDT0", "GPIO157/MMCDT1", "GPIO158/MMCDT2",
85*d0e4e8f0STomer Maimon	"GPIO159/MMCDT3", "GPIO160/CLKOUT/RNGOSCOUT", "GPIO161/nLFRAME/nESPICS",
86*d0e4e8f0STomer Maimon	"GPIO162/SERIRQ", "GPIO163/LCLK/ESPICLK", "GPIO164/LAD0/ESPI_IO0",
87*d0e4e8f0STomer Maimon	"GPIO165/LAD1/ESPI_IO1", "GPIO166/LAD2/ESPI_IO2", "GPIO167/LAD3/ESPI_IO3",
88*d0e4e8f0STomer Maimon	"GPIO168/nCLKRUN/nESPIALERT", "GPIO169/nSCIPME", "GPIO170/nSMI", "GPIO171/SMB6SCL",
89*d0e4e8f0STomer Maimon	"GPIO172/SMB6SDA", "GPIO173/SMB7SCL", "GPIO174/SMB7SDA", "GPIO175/PSPI1CK/FANIN19",
90*d0e4e8f0STomer Maimon	"GPIO176/PSPI1DO/FANIN18", "GPIO177/PSPI1DI/FANIN17", "GPIO178/R1TXD0",
91*d0e4e8f0STomer Maimon	"GPIO179/R1TXD1", "GPIO180/R1TXEN", "GPIO181/R1RXD0", "GPIO182/R1RXD1",
92*d0e4e8f0STomer Maimon	"GPIO183/SPI3CK", "GPO184/SPI3D0/STRAP9", "GPO185/SPI3D1/STRAP10",
93*d0e4e8f0STomer Maimon	"GPIO186/nSPI3CS0", "GPIO187/nSPI3CS1",	"GPIO188/SPI3D2/nSPI3CS2",
94*d0e4e8f0STomer Maimon	"GPIO189/SPI3D3/nSPI3CS3", "GPIO190/nPRD_SMI", "GPIO191", "GPIO192", "GPIO193/R1CRSDV",
95*d0e4e8f0STomer Maimon	"GPIO194/SMB0BSCL", "GPIO195/SMB0BSDA", "GPIO196/SMB0CSCL", "GPIO197/SMB0DEN",
96*d0e4e8f0STomer Maimon	"GPIO198/SMB0DSDA", "GPIO199/SMB0DSCL", "GPIO200/R2CK", "GPIO201/R1CK",
97*d0e4e8f0STomer Maimon	"GPIO202/SMB0CSDA", "GPIO203/FANIN16", "GPIO204/DDC2SCL", "GPIO205/DDC2SDA",
98*d0e4e8f0STomer Maimon	"GPIO206/HSYNC2", "GPIO207/VSYNC2", "GPIO208/RG2TXC/DVCK", "GPIO209/RG2TXCTL/DDRV4",
99*d0e4e8f0STomer Maimon	"GPIO210/RG2RXD0/DDRV5", "GPIO211/RG2RXD1/DDRV6", "GPIO212/RG2RXD2/DDRV7",
100*d0e4e8f0STomer Maimon	"GPIO213/RG2RXD3/DDRV8", "GPIO214/RG2RXC/DDRV9", "GPIO215/RG2RXCTL/DDRV10",
101*d0e4e8f0STomer Maimon	"GPIO216/RG2MDC/DDRV11", "GPIO217/RG2MDIO/DVHSYNC", "GPIO218/nWDO1",
102*d0e4e8f0STomer Maimon	"GPIO219/nWDO2", "GPIO220/SMB12SCL", "GPIO221/SMB12SDA", "GPIO222/SMB13SCL",
103*d0e4e8f0STomer Maimon	"GPIO223/SMB13SDA", "GPIO224/SPIXCK", "GPO225/SPIXD0/STRAP12", "GPO226/SPIXD1/STRAP13",
104*d0e4e8f0STomer Maimon	"GPIO227/nSPIXCS0", "GPIO228/nSPIXCS1",	"GPO229/SPIXD2/STRAP3", "GPIO230/SPIXD3",
105*d0e4e8f0STomer Maimon	"GPIO231/nCLKREQ", "GPI255/DACOSEL"
106*d0e4e8f0STomer Maimon
107*d0e4e8f0STomer MaimonOptional Properties:
108*d0e4e8f0STomer Maimon bias-disable, bias-pull-down, bias-pull-up, input-enable,
109*d0e4e8f0STomer Maimon input-disable, output-high, output-low, drive-push-pull,
110*d0e4e8f0STomer Maimon drive-open-drain, input-debounce, slew-rate, drive-strength
111*d0e4e8f0STomer Maimon
112*d0e4e8f0STomer Maimon slew-rate valid arguments are:
113*d0e4e8f0STomer Maimon				<0> - slow
114*d0e4e8f0STomer Maimon				<1> - fast
115*d0e4e8f0STomer Maimon drive-strength valid arguments are:
116*d0e4e8f0STomer Maimon				<2> - 2mA
117*d0e4e8f0STomer Maimon				<4> - 4mA
118*d0e4e8f0STomer Maimon				<8> - 8mA
119*d0e4e8f0STomer Maimon				<12> - 12mA
120*d0e4e8f0STomer Maimon				<16> - 16mA
121*d0e4e8f0STomer Maimon				<24> - 24mA
122*d0e4e8f0STomer Maimon
123*d0e4e8f0STomer MaimonFor example, pinctrl might have pinmux subnodes like the following:
124*d0e4e8f0STomer Maimon
125*d0e4e8f0STomer Maimon	gpio0_iox1d1_pin: gpio0-iox1d1-pin {
126*d0e4e8f0STomer Maimon		pins = "GPIO0/IOX1DI";
127*d0e4e8f0STomer Maimon		output-high;
128*d0e4e8f0STomer Maimon	};
129*d0e4e8f0STomer Maimon	gpio0_iox1ck_pin: gpio0-iox1ck-pin {
130*d0e4e8f0STomer Maimon		pins = "GPIO2/IOX1CK";
131*d0e4e8f0STomer Maimon		output_high;
132*d0e4e8f0STomer Maimon	};
133*d0e4e8f0STomer Maimon
134*d0e4e8f0STomer Maimon=== Pin Group Subnode ===
135*d0e4e8f0STomer Maimon
136*d0e4e8f0STomer MaimonRequired pin group subnode-properties:
137*d0e4e8f0STomer Maimon- groups : A string containing the name of the group to mux.
138*d0e4e8f0STomer Maimon- function: A string containing the name of the function to mux to the
139*d0e4e8f0STomer Maimon  group.
140*d0e4e8f0STomer Maimon
141*d0e4e8f0STomer MaimonThe following are the list of the available groups and functions :
142*d0e4e8f0STomer Maimon	smb0, smb0b, smb0c, smb0d, smb0den, smb1, smb1b, smb1c, smb1d,
143*d0e4e8f0STomer Maimon	smb2, smb2b, smb2c, smb2d, smb3, smb3b, smb3c, smb3d, smb4, smb4b,
144*d0e4e8f0STomer Maimon	smb4c, smb4d, smb4den, smb5, smb5b, smb5c, smb5d, ga20kbc, smb6,
145*d0e4e8f0STomer Maimon	smb7, smb8, smb9, smb10, smb11, smb12, smb13, smb14, smb15, fanin0,
146*d0e4e8f0STomer Maimon	fanin1, fanin2, fanin3, fanin4, fanin5, fanin6, fanin7, fanin8,
147*d0e4e8f0STomer Maimon	fanin9, fanin10, fanin11 fanin12 fanin13, fanin14, fanin15, faninx,
148*d0e4e8f0STomer Maimon	pwm0, pwm1, pwm2, pwm3, pwm4, pwm5, pwm6, pwm7, rg1, rg1mdio, rg2,
149*d0e4e8f0STomer Maimon	rg2mdio, ddr, uart1, uart2, bmcuart0a, bmcuart0b, bmcuart1, iox1,
150*d0e4e8f0STomer Maimon	iox2, ioxh, gspi, mmc, mmcwp, mmccd, mmcrst, mmc8, r1, r1err, r1md,
151*d0e4e8f0STomer Maimon	r2, r2err, r2md, sd1, sd1pwr, wdog1, wdog2, scipme, sci, serirq,
152*d0e4e8f0STomer Maimon	jtag2, spix, spixcs1, pspi1, pspi2, ddc, clkreq, clkout, spi3, spi3cs1,
153*d0e4e8f0STomer Maimon	spi3quad, spi3cs2, spi3cs3, spi0cs1, lpc, lpcclk, espi, lkgpo0, lkgpo1,
154*d0e4e8f0STomer Maimon	lkgpo2, nprd_smi
155*d0e4e8f0STomer Maimon
156*d0e4e8f0STomer MaimonFor example, pinctrl might have group subnodes like the following:
157*d0e4e8f0STomer Maimon	r1err_pins: r1err-pins {
158*d0e4e8f0STomer Maimon		groups = "r1err";
159*d0e4e8f0STomer Maimon		function = "r1err";
160*d0e4e8f0STomer Maimon	};
161*d0e4e8f0STomer Maimon	r1md_pins: r1md-pins {
162*d0e4e8f0STomer Maimon		groups = "r1md";
163*d0e4e8f0STomer Maimon		function = "r1md";
164*d0e4e8f0STomer Maimon	};
165*d0e4e8f0STomer Maimon	r1_pins: r1-pins {
166*d0e4e8f0STomer Maimon		groups = "r1";
167*d0e4e8f0STomer Maimon		function = "r1";
168*d0e4e8f0STomer Maimon	};
169*d0e4e8f0STomer Maimon
170*d0e4e8f0STomer MaimonExamples
171*d0e4e8f0STomer Maimon========
172*d0e4e8f0STomer Maimonpinctrl: pinctrl@f0800000 {
173*d0e4e8f0STomer Maimon	#address-cells = <1>;
174*d0e4e8f0STomer Maimon	#size-cells = <1>;
175*d0e4e8f0STomer Maimon	compatible = "nuvoton,npcm750-pinctrl";
176*d0e4e8f0STomer Maimon	ranges = <0 0xf0010000 0x8000>;
177*d0e4e8f0STomer Maimon
178*d0e4e8f0STomer Maimon	gpio0: gpio@f0010000 {
179*d0e4e8f0STomer Maimon		gpio-controller;
180*d0e4e8f0STomer Maimon		#gpio-cells = <2>;
181*d0e4e8f0STomer Maimon		reg = <0x0 0x80>;
182*d0e4e8f0STomer Maimon		interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
183*d0e4e8f0STomer Maimon		gpio-ranges = <&pinctrl 0 0 32>;
184*d0e4e8f0STomer Maimon	};
185*d0e4e8f0STomer Maimon
186*d0e4e8f0STomer Maimon	....
187*d0e4e8f0STomer Maimon
188*d0e4e8f0STomer Maimon	gpio7: gpio@f0017000 {
189*d0e4e8f0STomer Maimon		gpio-controller;
190*d0e4e8f0STomer Maimon		#gpio-cells = <2>;
191*d0e4e8f0STomer Maimon		reg = <0x7000 0x80>;
192*d0e4e8f0STomer Maimon		interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
193*d0e4e8f0STomer Maimon		gpio-ranges = <&pinctrl 0 224 32>;
194*d0e4e8f0STomer Maimon	};
195*d0e4e8f0STomer Maimon
196*d0e4e8f0STomer Maimon	gpio0_iox1d1_pin: gpio0-iox1d1-pin {
197*d0e4e8f0STomer Maimon		pins = "GPIO0/IOX1DI";
198*d0e4e8f0STomer Maimon		output-high;
199*d0e4e8f0STomer Maimon	};
200*d0e4e8f0STomer Maimon
201*d0e4e8f0STomer Maimon	iox1_pins: iox1-pins {
202*d0e4e8f0STomer Maimon		groups = "iox1";
203*d0e4e8f0STomer Maimon		function = "iox1";
204*d0e4e8f0STomer Maimon	};
205*d0e4e8f0STomer Maimon	iox2_pins: iox2-pins {
206*d0e4e8f0STomer Maimon		groups = "iox2";
207*d0e4e8f0STomer Maimon		function = "iox2";
208*d0e4e8f0STomer Maimon	};
209*d0e4e8f0STomer Maimon
210*d0e4e8f0STomer Maimon	....
211*d0e4e8f0STomer Maimon
212*d0e4e8f0STomer Maimon	clkreq_pins: clkreq-pins {
213*d0e4e8f0STomer Maimon		groups = "clkreq";
214*d0e4e8f0STomer Maimon		function = "clkreq";
215*d0e4e8f0STomer Maimon	};
216*d0e4e8f0STomer Maimon};
217