xref: /linux/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml (revision be1ca3ee8f97067fee87fda73ea5959d5ab75bbf) 
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/mscc,ocelot-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Microsemi Ocelot pin controller
8
9maintainers:
10  - Alexandre Belloni <alexandre.belloni@bootlin.com>
11  - Lars Povlsen <lars.povlsen@microchip.com>
12
13properties:
14  compatible:
15    oneOf:
16      - enum:
17          - microchip,lan96455f-pinctrl
18          - microchip,lan966x-pinctrl
19          - microchip,lan9691-pinctrl
20          - microchip,sparx5-pinctrl
21          - mscc,jaguar2-pinctrl
22          - mscc,luton-pinctrl
23          - mscc,ocelot-pinctrl
24          - mscc,serval-pinctrl
25          - mscc,servalt-pinctrl
26      - items:
27          - enum:
28              - microchip,lan9698-pinctrl
29              - microchip,lan9696-pinctrl
30              - microchip,lan9694-pinctrl
31              - microchip,lan9693-pinctrl
32              - microchip,lan9692-pinctrl
33          - const: microchip,lan9691-pinctrl
34      - items:
35          - enum:
36              - microchip,lan96457f-pinctrl
37              - microchip,lan96459f-pinctrl
38          - const: microchip,lan96455f-pinctrl
39
40  reg:
41    items:
42      - description: Base address
43      - description: Extended pin configuration registers
44    minItems: 1
45
46  gpio-controller: true
47
48  '#gpio-cells':
49    const: 2
50
51  gpio-ranges: true
52
53  interrupts:
54    maxItems: 1
55
56  interrupt-controller: true
57
58  "#interrupt-cells":
59    const: 2
60
61  resets:
62    maxItems: 1
63
64  reset-names:
65    description: Optional shared switch reset.
66    items:
67      - const: switch
68
69patternProperties:
70  '-pins$':
71    type: object
72    allOf:
73      - $ref: pinmux-node.yaml
74      - $ref: pincfg-node.yaml
75
76    properties:
77      function: true
78      pins: true
79      output-high: true
80      output-low: true
81      drive-strength: true
82
83    required:
84      - function
85      - pins
86
87    additionalProperties: false
88
89required:
90  - compatible
91  - reg
92  - gpio-controller
93  - '#gpio-cells'
94  - gpio-ranges
95
96allOf:
97  - $ref: pinctrl.yaml#
98  - if:
99      properties:
100        compatible:
101          contains:
102            enum:
103              - microchip,lan966x-pinctrl
104              - microchip,lan9691-pinctrl
105              - microchip,sparx5-pinctrl
106    then:
107      properties:
108        reg:
109          minItems: 2
110
111additionalProperties: false
112
113examples:
114  - |
115    gpio: pinctrl@71070034 {
116        compatible = "mscc,ocelot-pinctrl";
117        reg = <0x71070034 0x28>;
118        gpio-controller;
119        #gpio-cells = <2>;
120        gpio-ranges = <&gpio 0 0 22>;
121
122        uart_pins: uart-pins {
123            pins = "GPIO_6", "GPIO_7";
124            function = "uart";
125        };
126
127        uart2_pins: uart2-pins {
128            pins = "GPIO_12", "GPIO_13";
129            function = "uart2";
130        };
131    };
132
133...
134