xref: /linux/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml (revision 50501936288d6a29d7ef78f25d00e33240fad45f) 
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/mscc,ocelot-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Microsemi Ocelot pin controller
8
9maintainers:
10  - Alexandre Belloni <alexandre.belloni@bootlin.com>
11  - Lars Povlsen <lars.povlsen@microchip.com>
12
13properties:
14  compatible:
15    enum:
16      - microchip,lan966x-pinctrl
17      - microchip,sparx5-pinctrl
18      - mscc,jaguar2-pinctrl
19      - mscc,luton-pinctrl
20      - mscc,ocelot-pinctrl
21      - mscc,serval-pinctrl
22      - mscc,servalt-pinctrl
23
24  reg:
25    items:
26      - description: Base address
27      - description: Extended pin configuration registers
28    minItems: 1
29
30  gpio-controller: true
31
32  '#gpio-cells':
33    const: 2
34
35  gpio-ranges: true
36
37  interrupts:
38    maxItems: 1
39
40  interrupt-controller: true
41
42  "#interrupt-cells":
43    const: 2
44
45  resets:
46    maxItems: 1
47
48  reset-names:
49    description: Optional shared switch reset.
50    items:
51      - const: switch
52
53patternProperties:
54  '-pins$':
55    type: object
56    allOf:
57      - $ref: pinmux-node.yaml
58      - $ref: pincfg-node.yaml
59
60    properties:
61      function: true
62      pins: true
63      output-high: true
64      output-low: true
65      drive-strength: true
66
67    required:
68      - function
69      - pins
70
71    additionalProperties: false
72
73required:
74  - compatible
75  - reg
76  - gpio-controller
77  - '#gpio-cells'
78  - gpio-ranges
79
80allOf:
81  - $ref: pinctrl.yaml#
82  - if:
83      properties:
84        compatible:
85          contains:
86            enum:
87              - microchip,lan966x-pinctrl
88              - microchip,sparx5-pinctrl
89    then:
90      properties:
91        reg:
92          minItems: 2
93
94additionalProperties: false
95
96examples:
97  - |
98    gpio: pinctrl@71070034 {
99        compatible = "mscc,ocelot-pinctrl";
100        reg = <0x71070034 0x28>;
101        gpio-controller;
102        #gpio-cells = <2>;
103        gpio-ranges = <&gpio 0 0 22>;
104
105        uart_pins: uart-pins {
106            pins = "GPIO_6", "GPIO_7";
107            function = "uart";
108        };
109
110        uart2_pins: uart2-pins {
111            pins = "GPIO_12", "GPIO_13";
112            function = "uart2";
113        };
114    };
115
116...
117