xref: /linux/Documentation/devicetree/bindings/pinctrl/microchip,pic32mzda-pinctrl.yaml (revision cf9610f9116d55c5a66ef9f1faecacabd93a9322)
1*daa12f3aSUdaya Kiran Challa# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*daa12f3aSUdaya Kiran Challa%YAML 1.2
3*daa12f3aSUdaya Kiran Challa---
4*daa12f3aSUdaya Kiran Challa$id: http://devicetree.org/schemas/pinctrl/microchip,pic32mzda-pinctrl.yaml#
5*daa12f3aSUdaya Kiran Challa$schema: http://devicetree.org/meta-schemas/core.yaml#
6*daa12f3aSUdaya Kiran Challa
7*daa12f3aSUdaya Kiran Challatitle: Microchip PIC32 Pin Controller
8*daa12f3aSUdaya Kiran Challa
9*daa12f3aSUdaya Kiran Challamaintainers:
10*daa12f3aSUdaya Kiran Challa  - Linus Walleij <linusw@kernel.org>
11*daa12f3aSUdaya Kiran Challa
12*daa12f3aSUdaya Kiran Challadescription:
13*daa12f3aSUdaya Kiran Challa  PIC32 pin configuration node is a node of a group of pins which can be used
14*daa12f3aSUdaya Kiran Challa  for a specific device or function. This node represents configurations of
15*daa12f3aSUdaya Kiran Challa  pins, optional function, and optional mux related configuration.
16*daa12f3aSUdaya Kiran Challa
17*daa12f3aSUdaya Kiran Challaproperties:
18*daa12f3aSUdaya Kiran Challa  compatible:
19*daa12f3aSUdaya Kiran Challa    const: microchip,pic32mzda-pinctrl
20*daa12f3aSUdaya Kiran Challa
21*daa12f3aSUdaya Kiran Challa  reg:
22*daa12f3aSUdaya Kiran Challa    maxItems: 1
23*daa12f3aSUdaya Kiran Challa
24*daa12f3aSUdaya Kiran Challa  clocks:
25*daa12f3aSUdaya Kiran Challa    maxItems: 1
26*daa12f3aSUdaya Kiran Challa
27*daa12f3aSUdaya Kiran Challa$defs:
28*daa12f3aSUdaya Kiran Challa  pin-node:
29*daa12f3aSUdaya Kiran Challa    type: object
30*daa12f3aSUdaya Kiran Challa    allOf:
31*daa12f3aSUdaya Kiran Challa      - $ref: /schemas/pinctrl/pincfg-node.yaml#
32*daa12f3aSUdaya Kiran Challa      - $ref: /schemas/pinctrl/pinmux-node.yaml#
33*daa12f3aSUdaya Kiran Challa
34*daa12f3aSUdaya Kiran Challa    properties:
35*daa12f3aSUdaya Kiran Challa      pins:
36*daa12f3aSUdaya Kiran Challa        description: List of pins to which the configuration applies.
37*daa12f3aSUdaya Kiran Challa        items:
38*daa12f3aSUdaya Kiran Challa          type: string
39*daa12f3aSUdaya Kiran Challa        minItems: 1
40*daa12f3aSUdaya Kiran Challa
41*daa12f3aSUdaya Kiran Challa      function: true
42*daa12f3aSUdaya Kiran Challa
43*daa12f3aSUdaya Kiran Challa      bias-pull-up: true
44*daa12f3aSUdaya Kiran Challa      bias-pull-down: true
45*daa12f3aSUdaya Kiran Challa      input-enable: true
46*daa12f3aSUdaya Kiran Challa      output-low: true
47*daa12f3aSUdaya Kiran Challa      output-high: true
48*daa12f3aSUdaya Kiran Challa
49*daa12f3aSUdaya Kiran Challa      microchip,digital:
50*daa12f3aSUdaya Kiran Challa        description: Enable digital I/O.
51*daa12f3aSUdaya Kiran Challa        type: boolean
52*daa12f3aSUdaya Kiran Challa
53*daa12f3aSUdaya Kiran Challa      microchip,analog:
54*daa12f3aSUdaya Kiran Challa        description: Enable analog I/O.
55*daa12f3aSUdaya Kiran Challa        type: boolean
56*daa12f3aSUdaya Kiran Challa
57*daa12f3aSUdaya Kiran Challa    required:
58*daa12f3aSUdaya Kiran Challa      - pins
59*daa12f3aSUdaya Kiran Challa
60*daa12f3aSUdaya Kiran Challa    unevaluatedProperties: false
61*daa12f3aSUdaya Kiran Challa
62*daa12f3aSUdaya Kiran ChallaadditionalProperties:
63*daa12f3aSUdaya Kiran Challa  oneOf:
64*daa12f3aSUdaya Kiran Challa    - additionalProperties:
65*daa12f3aSUdaya Kiran Challa        $ref: '#/$defs/pin-node'
66*daa12f3aSUdaya Kiran Challa    - $ref: '#/$defs/pin-node'
67*daa12f3aSUdaya Kiran Challa
68*daa12f3aSUdaya Kiran Challarequired:
69*daa12f3aSUdaya Kiran Challa  - compatible
70*daa12f3aSUdaya Kiran Challa  - reg
71*daa12f3aSUdaya Kiran Challa  - clocks
72*daa12f3aSUdaya Kiran Challa
73*daa12f3aSUdaya Kiran Challaexamples:
74*daa12f3aSUdaya Kiran Challa  - |
75*daa12f3aSUdaya Kiran Challa    #include <dt-bindings/clock/microchip,pic32-clock.h>
76*daa12f3aSUdaya Kiran Challa    #include <dt-bindings/interrupt-controller/irq.h>
77*daa12f3aSUdaya Kiran Challa
78*daa12f3aSUdaya Kiran Challa    pic32_pinctrl: pinctrl@1f801400 {
79*daa12f3aSUdaya Kiran Challa        compatible = "microchip,pic32mzda-pinctrl";
80*daa12f3aSUdaya Kiran Challa        reg = <0x1f801400 0x400>;
81*daa12f3aSUdaya Kiran Challa        clocks = <&rootclk PB1CLK>;
82*daa12f3aSUdaya Kiran Challa
83*daa12f3aSUdaya Kiran Challa        pinctrl_uart2: pinctrl_uart2 {
84*daa12f3aSUdaya Kiran Challa            uart2-tx {
85*daa12f3aSUdaya Kiran Challa                pins = "G9";
86*daa12f3aSUdaya Kiran Challa                function = "U2TX";
87*daa12f3aSUdaya Kiran Challa                microchip,digital;
88*daa12f3aSUdaya Kiran Challa                output-low;
89*daa12f3aSUdaya Kiran Challa            };
90*daa12f3aSUdaya Kiran Challa
91*daa12f3aSUdaya Kiran Challa            uart2-rx {
92*daa12f3aSUdaya Kiran Challa                pins = "B0";
93*daa12f3aSUdaya Kiran Challa                function = "U2RX";
94*daa12f3aSUdaya Kiran Challa                microchip,digital;
95*daa12f3aSUdaya Kiran Challa                input-enable;
96*daa12f3aSUdaya Kiran Challa            };
97*daa12f3aSUdaya Kiran Challa        };
98*daa12f3aSUdaya Kiran Challa    };
99*daa12f3aSUdaya Kiran Challa
100*daa12f3aSUdaya Kiran Challa    uart2: serial@1f822200 {
101*daa12f3aSUdaya Kiran Challa        compatible = "microchip,pic32mzda-uart";
102*daa12f3aSUdaya Kiran Challa        reg = <0x1f822200 0x50>;
103*daa12f3aSUdaya Kiran Challa        interrupts = <145 IRQ_TYPE_LEVEL_HIGH>,
104*daa12f3aSUdaya Kiran Challa                     <146 IRQ_TYPE_LEVEL_HIGH>,
105*daa12f3aSUdaya Kiran Challa                     <147 IRQ_TYPE_LEVEL_HIGH>;
106*daa12f3aSUdaya Kiran Challa        clocks = <&rootclk PB2CLK>;
107*daa12f3aSUdaya Kiran Challa        pinctrl-names = "default";
108*daa12f3aSUdaya Kiran Challa        pinctrl-0 = <&pinctrl_uart2>;
109*daa12f3aSUdaya Kiran Challa    };
110