xref: /linux/Documentation/devicetree/bindings/pinctrl/microchip,mpfs-pinctrl-mssio.yaml (revision c17ee635fd3a482b2ad2bf5e269755c2eae5f25e) 
1*6b324d19SConor Dooley# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2*6b324d19SConor Dooley%YAML 1.2
3*6b324d19SConor Dooley---
4*6b324d19SConor Dooley$id: http://devicetree.org/schemas/pinctrl/microchip,mpfs-pinctrl-mssio.yaml#
5*6b324d19SConor Dooley$schema: http://devicetree.org/meta-schemas/core.yaml#
6*6b324d19SConor Dooley
7*6b324d19SConor Dooleytitle: Microchip Polarfire SoC MSSIO pinctrl
8*6b324d19SConor Dooley
9*6b324d19SConor Dooleymaintainers:
10*6b324d19SConor Dooley  - Conor Dooley <conor.dooley@microchip.com>
11*6b324d19SConor Dooley
12*6b324d19SConor Dooleyproperties:
13*6b324d19SConor Dooley  compatible:
14*6b324d19SConor Dooley    oneOf:
15*6b324d19SConor Dooley      - const: microchip,mpfs-pinctrl-mssio
16*6b324d19SConor Dooley      - items:
17*6b324d19SConor Dooley          - const: microchip,pic64gx-pinctrl-mssio
18*6b324d19SConor Dooley          - const: microchip,mpfs-pinctrl-mssio
19*6b324d19SConor Dooley
20*6b324d19SConor Dooley  reg:
21*6b324d19SConor Dooley    maxItems: 1
22*6b324d19SConor Dooley
23*6b324d19SConor Dooley  pinctrl-use-default: true
24*6b324d19SConor Dooley
25*6b324d19SConor DooleypatternProperties:
26*6b324d19SConor Dooley  '-cfg$':
27*6b324d19SConor Dooley    type: object
28*6b324d19SConor Dooley    additionalProperties: false
29*6b324d19SConor Dooley
30*6b324d19SConor Dooley    patternProperties:
31*6b324d19SConor Dooley      '-pins$':
32*6b324d19SConor Dooley        type: object
33*6b324d19SConor Dooley        additionalProperties: false
34*6b324d19SConor Dooley
35*6b324d19SConor Dooley        allOf:
36*6b324d19SConor Dooley          - $ref: pincfg-node.yaml#
37*6b324d19SConor Dooley          - $ref: pinmux-node.yaml#
38*6b324d19SConor Dooley
39*6b324d19SConor Dooley        properties:
40*6b324d19SConor Dooley          pins:
41*6b324d19SConor Dooley            description:
42*6b324d19SConor Dooley              The list of IOs that properties in the pincfg node apply to.
43*6b324d19SConor Dooley
44*6b324d19SConor Dooley          function:
45*6b324d19SConor Dooley            description:
46*6b324d19SConor Dooley              A string containing the name of the function to mux for these
47*6b324d19SConor Dooley              pins. The "reserved" function tristates a pin.
48*6b324d19SConor Dooley            enum: [ sd, emmc, qspi, spi, usb, uart, i2c, can, mdio, misc
49*6b324d19SConor Dooley                    reserved, gpio, fabric-test, tied-low, tied-high, tristate ]
50*6b324d19SConor Dooley
51*6b324d19SConor Dooley          bias-bus-hold: true
52*6b324d19SConor Dooley          bias-disable: true
53*6b324d19SConor Dooley          bias-pull-down: true
54*6b324d19SConor Dooley          bias-pull-up: true
55*6b324d19SConor Dooley          input-schmitt-enable: true
56*6b324d19SConor Dooley          low-power-enable: true
57*6b324d19SConor Dooley
58*6b324d19SConor Dooley          drive-strength:
59*6b324d19SConor Dooley            enum: [ 2, 4, 6, 8, 10, 12, 16, 20 ]
60*6b324d19SConor Dooley
61*6b324d19SConor Dooley          power-source:
62*6b324d19SConor Dooley            description:
63*6b324d19SConor Dooley              Which bank voltage to use. This cannot differ for pins in a
64*6b324d19SConor Dooley              given bank, the whole bank uses the same voltage.
65*6b324d19SConor Dooley            enum: [ 1200000, 1500000, 1800000, 2500000, 3300000 ]
66*6b324d19SConor Dooley
67*6b324d19SConor Dooley          microchip,clamp-diode:
68*6b324d19SConor Dooley            $ref: /schemas/types.yaml#/definitions/flag
69*6b324d19SConor Dooley            description:
70*6b324d19SConor Dooley              Reflects the "Clamp Diode" setting in the MSS Configurator for
71*6b324d19SConor Dooley              this pin. This setting controls whether or not input voltage
72*6b324d19SConor Dooley              clamping should be enabled.
73*6b324d19SConor Dooley
74*6b324d19SConor Dooley          microchip,ibufmd:
75*6b324d19SConor Dooley            $ref: /schemas/types.yaml#/definitions/uint32
76*6b324d19SConor Dooley            default: 0
77*6b324d19SConor Dooley            description:
78*6b324d19SConor Dooley              Reflects the "IBUFMD" bits in the MSS Configurator output files
79*6b324d19SConor Dooley              for this pin.
80*6b324d19SConor Dooley
81*6b324d19SConor Dooley        required:
82*6b324d19SConor Dooley          - pins
83*6b324d19SConor Dooley          - function
84*6b324d19SConor Dooley          - power-source
85*6b324d19SConor Dooley
86*6b324d19SConor Dooleyrequired:
87*6b324d19SConor Dooley  - compatible
88*6b324d19SConor Dooley  - reg
89*6b324d19SConor Dooley
90*6b324d19SConor DooleyadditionalProperties: false
91*6b324d19SConor Dooley
92*6b324d19SConor Dooleyexamples:
93*6b324d19SConor Dooley  - |
94*6b324d19SConor Dooley    pinctrl@204 {
95*6b324d19SConor Dooley      compatible = "microchip,mpfs-pinctrl-mssio";
96*6b324d19SConor Dooley      reg = <0x204 0x7c>;
97*6b324d19SConor Dooley
98*6b324d19SConor Dooley      ikrd-spi1-cfg {
99*6b324d19SConor Dooley        spi1-pins {
100*6b324d19SConor Dooley          pins = <30>, <31>, <32>, <33>;
101*6b324d19SConor Dooley          function = "spi";
102*6b324d19SConor Dooley          bias-pull-up;
103*6b324d19SConor Dooley          drive-strength = <8>;
104*6b324d19SConor Dooley          power-source = <3300000>;
105*6b324d19SConor Dooley          microchip,ibufmd = <0x1>;
106*6b324d19SConor Dooley        };
107*6b324d19SConor Dooley      };
108*6b324d19SConor Dooley    };
109*6b324d19SConor Dooley...
110