xref: /linux/Documentation/devicetree/bindings/pinctrl/microchip,mcp23s08.yaml (revision 79d2e1919a2728ef49d938eb20ebd5903c14dfb0) 
1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/microchip,mcp23s08.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Microchip I/O expander with serial interface (I2C/SPI)
8
9maintainers:
10  - Himanshu Bhavani <himanshu.bhavani@siliconsignals.io>
11
12description:
13  Microchip MCP23008, MCP23017, MCP23S08, MCP23S17, MCP23S18 GPIO expander
14  chips.These chips provide 8 or 16 GPIO pins with either I2C or SPI interface.
15
16allOf:
17  - $ref: /schemas/spi/spi-peripheral-props.yaml#
18
19properties:
20  compatible:
21    enum:
22      - microchip,mcp23s08
23      - microchip,mcp23s17
24      - microchip,mcp23s18
25      - microchip,mcp23008
26      - microchip,mcp23017
27      - microchip,mcp23018
28
29  reg:
30    maxItems: 1
31
32  gpio-controller: true
33
34  '#gpio-cells':
35    const: 2
36
37  interrupt-controller: true
38
39  '#interrupt-cells':
40    const: 2
41
42  interrupts:
43    maxItems: 1
44
45  reset-gpios:
46    description: GPIO specifier for active-low reset pin.
47    maxItems: 1
48
49  microchip,spi-present-mask:
50    description:
51      Multiple SPI chips can share the same SPI chipselect. Set a bit in
52      bit0-7 in this mask to 1 if there is a chip connected with the
53      corresponding spi address set. For example if you have a chip with
54      address 3 connected, you have to set bit3 to 1, which is 0x08. mcp23s08
55      chip variant only supports bits 0-3. It is not possible to mix mcp23s08
56      and mcp23s17 on the same chipselect. Set at least one bit to 1 for SPI
57      chips.
58    $ref: /schemas/types.yaml#/definitions/uint8
59
60  microchip,irq-mirror:
61    type: boolean
62    description:
63      Sets the mirror flag in the IOCON register. Devices with two interrupt
64      outputs (these are the devices ending with 17 and those that have 16 IOs)
65      have two IO banks IO 0-7 form bank 1 and IO 8-15 are bank 2. These chips
66      have two different interrupt outputs One for bank 1 and another for
67      bank 2. If irq-mirror is set, both interrupts are generated regardless of
68      the bank that an input change occurred on. If it is not set,the interrupt
69      are only generated for the bank they belong to.
70
71  microchip,irq-active-high:
72    type: boolean
73    description:
74      Sets the INTPOL flag in the IOCON register.This configures the IRQ output
75      polarity as active high.
76
77  drive-open-drain:
78    type: boolean
79    description:
80      Sets the ODR flag in the IOCON register. This configures the IRQ output as
81      open drain active low.
82
83  pinmux:
84    type: object
85    properties:
86      pins:
87        description:
88          The list of GPIO pins controlled by this node. Each pin name
89          corresponds to a physical pin on the GPIO expander.
90        items:
91          pattern: '^gpio([0-9]|[1][0-5])$'
92        maxItems: 16
93
94      bias-pull-up:
95        type: boolean
96        description:
97          Configures pull-up resistors for the GPIO pins. Absence of this
98          property will leave the configuration in its default state.
99
100    required:
101      - pins
102
103    additionalProperties: false
104
105required:
106  - compatible
107  - reg
108  - gpio-controller
109  - '#gpio-cells'
110
111unevaluatedProperties: false
112
113examples:
114  - |
115    #include <dt-bindings/interrupt-controller/irq.h>
116    #include <dt-bindings/gpio/gpio.h>
117
118    i2c {
119        #address-cells = <1>;
120        #size-cells = <0>;
121
122        gpio@21 {
123            compatible = "microchip,mcp23017";
124            reg = <0x21>;
125            gpio-controller;
126            #gpio-cells = <2>;
127
128            interrupt-parent = <&gpio1>;
129            interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
130            interrupt-controller;
131            #interrupt-cells = <2>;
132
133            microchip,irq-mirror;
134            pinctrl-names = "default";
135            pinctrl-0 = <&pinctrl_i2c_gpio0>, <&gpiopullups>;
136            reset-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>;
137
138            gpiopullups: pinmux {
139                pins = "gpio0", "gpio1", "gpio2", "gpio3",
140                       "gpio4", "gpio5", "gpio6", "gpio7",
141                       "gpio8", "gpio9", "gpio10", "gpio11",
142                       "gpio12", "gpio13", "gpio14", "gpio15";
143                bias-pull-up;
144            };
145        };
146    };
147
148  - |
149    spi {
150        #address-cells = <1>;
151        #size-cells = <0>;
152
153        gpio@0 {
154            compatible = "microchip,mcp23s17";
155            reg = <0>;
156            gpio-controller;
157            #gpio-cells = <2>;
158            spi-max-frequency = <1000000>;
159            microchip,spi-present-mask = /bits/ 8 <0x01>;
160        };
161    };
162