1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/mediatek,mt7622-pinctrl.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: MediaTek MT7622 Pin Controller 8 9maintainers: 10 - Sean Wang <sean.wang@kernel.org> 11 12description: 13 The MediaTek's MT7622 Pin controller is used to control SoC pins. 14 15properties: 16 compatible: 17 enum: 18 - mediatek,mt7622-pinctrl 19 - mediatek,mt7629-pinctrl 20 21 reg: 22 maxItems: 2 23 24 reg-names: 25 items: 26 - const: base 27 - const: eint 28 29 gpio-controller: true 30 31 "#gpio-cells": 32 const: 2 33 description: 34 Number of cells in GPIO specifier. Since the generic GPIO binding is used, 35 the amount of cells must be specified as 2. See the below mentioned gpio 36 binding representation for description of particular cells. 37 38 gpio-ranges: 39 maxItems: 1 40 41 interrupt-controller: true 42 43 interrupts: 44 maxItems: 1 45 46 "#interrupt-cells": 47 const: 2 48 49allOf: 50 - $ref: pinctrl.yaml# 51 52required: 53 - compatible 54 - reg 55 - gpio-controller 56 - "#gpio-cells" 57 58if: 59 required: 60 - interrupt-controller 61then: 62 required: 63 - reg-names 64 - interrupts 65 - "#interrupt-cells" 66 67patternProperties: 68 '-pins(-[a-z]+)?$': 69 type: object 70 additionalProperties: false 71 patternProperties: 72 '^mux(-|$)': 73 type: object 74 additionalProperties: false 75 description: 76 pinmux configuration nodes. 77 $ref: /schemas/pinctrl/pinmux-node.yaml 78 properties: 79 function: 80 description: 81 A string containing the name of the function to mux to the group. 82 enum: [antsel, emmc, eth, i2c, i2s, ir, led, flash, pcie, pmic, pwm, 83 sd, spi, tdm, uart, watchdog, wifi] 84 85 groups: 86 description: 87 An array of strings. Each string contains the name of a group. 88 89 drive-strength: 90 enum: [4, 8, 12, 16] 91 92 required: 93 - groups 94 - function 95 96 allOf: 97 - if: 98 properties: 99 function: 100 const: antsel 101 then: 102 properties: 103 groups: 104 items: 105 enum: [antsel0, antsel1, antsel2, antsel3, antsel4, antsel5, 106 antsel6, antsel7, antsel8, antsel9, antsel10, 107 antsel11, antsel12, antsel13, antsel14, antsel15, 108 antsel16, antsel17, antsel18, antsel19, antsel20, 109 antsel21, antsel22, antsel23, antsel24, antsel25, 110 antsel26, antsel27, antsel28, antsel29] 111 - if: 112 properties: 113 function: 114 const: emmc 115 then: 116 properties: 117 groups: 118 items: 119 enum: [emmc, emmc_rst] 120 - if: 121 properties: 122 function: 123 const: eth 124 then: 125 properties: 126 groups: 127 items: 128 enum: [esw, esw_p0_p1, esw_p2_p3_p4, rgmii_via_esw, 129 rgmii_via_gmac1, rgmii_via_gmac2, mdc_mdio] 130 - if: 131 properties: 132 function: 133 const: i2c 134 then: 135 properties: 136 groups: 137 enum: [i2c0, i2c_0, i2c_1, i2c1_0, i2c1_1, i2c1_2, i2c2_0, 138 i2c2_1, i2c2_2] 139 - if: 140 properties: 141 function: 142 const: i2s 143 then: 144 properties: 145 groups: 146 items: 147 enum: [i2s_in_mclk_bclk_ws, i2s1_in_data, i2s2_in_data, 148 i2s3_in_data, i2s4_in_data, i2s_out_mclk_bclk_ws, 149 i2s1_out_data, i2s2_out_data, i2s3_out_data, 150 i2s4_out_data] 151 - if: 152 properties: 153 function: 154 const: ir 155 then: 156 properties: 157 groups: 158 enum: [ir_0_tx, ir_1_tx, ir_2_tx, ir_0_rx, ir_1_rx, ir_2_rx] 159 - if: 160 properties: 161 function: 162 const: led 163 then: 164 properties: 165 groups: 166 enum: [ephy_leds, ephy0_led, ephy1_led, ephy2_led, ephy3_led, 167 ephy4_led, wled, wf2g_led, wf5g_led] 168 - if: 169 properties: 170 function: 171 const: flash 172 then: 173 properties: 174 groups: 175 enum: [par_nand, snfi, spi_nor] 176 - if: 177 properties: 178 function: 179 const: pcie 180 then: 181 properties: 182 groups: 183 items: 184 enum: [pcie0_0_waken, pcie0_1_waken, pcie1_0_waken, 185 pcie0_0_clkreq, pcie0_1_clkreq, pcie1_0_clkreq, 186 pcie0_pad_perst, pcie1_pad_perst, pcie_pereset, 187 pcie_wake, pcie_clkreq] 188 - if: 189 properties: 190 function: 191 const: pmic 192 then: 193 properties: 194 groups: 195 enum: [pmic_bus] 196 - if: 197 properties: 198 function: 199 const: pwm 200 then: 201 properties: 202 groups: 203 items: 204 enum: [pwm_ch1_0, pwm_ch1_1, pwm_ch1_2, pwm_ch2_0, pwm_ch2_1, 205 pwm_ch2_2, pwm_ch3_0, pwm_ch3_1, pwm_ch3_2, pwm_ch4_0, 206 pwm_ch4_1, pwm_ch4_2, pwm_ch4_3, pwm_ch5_0, pwm_ch5_1, 207 pwm_ch5_2, pwm_ch6_0, pwm_ch6_1, pwm_ch6_2, pwm_ch6_3, 208 pwm_ch7_0, pwm_ch7_2, pwm_0, pwm_1] 209 - if: 210 properties: 211 function: 212 const: sd 213 then: 214 properties: 215 groups: 216 enum: [sd_0, sd_1] 217 - if: 218 properties: 219 function: 220 const: spi 221 then: 222 properties: 223 groups: 224 enum: [spic0_0, spic0_1, spic1_0, spic1_1, spic2_0_wp_hold, 225 spic2_0, spi_0, spi_1, spi_wp, spi_hold] 226 - if: 227 properties: 228 function: 229 const: tdm 230 then: 231 properties: 232 groups: 233 enum: [tdm_0_out_mclk_bclk_ws, tdm_0_in_mclk_bclk_ws, 234 tdm_0_out_data, tdm_0_in_data, tdm_1_out_mclk_bclk_ws, 235 tdm_1_in_mclk_bclk_ws, tdm_1_out_data, tdm_1_in_data] 236 - if: 237 properties: 238 function: 239 const: uart 240 then: 241 properties: 242 groups: 243 enum: [uart0_0_tx_rx, uart1_0_tx_rx, uart1_0_rts_cts, 244 uart1_1_tx_rx, uart1_1_rts_cts, uart2_0_tx_rx, 245 uart2_0_rts_cts, uart2_1_tx_rx, uart2_1_rts_cts, 246 uart2_2_tx_rx, uart2_2_rts_cts, uart2_3_tx_rx, 247 uart3_0_tx_rx, uart3_1_tx_rx, uart3_1_rts_cts, 248 uart4_0_tx_rx, uart4_1_tx_rx, uart4_1_rts_cts, 249 uart4_2_tx_rx, uart4_2_rts_cts, uart0_txd_rxd, 250 uart1_0_txd_rxd, uart1_0_cts_rts, uart1_1_txd_rxd, 251 uart1_1_cts_rts, uart2_0_txd_rxd, uart2_0_cts_rts, 252 uart2_1_txd_rxd, uart2_1_cts_rts] 253 - if: 254 properties: 255 function: 256 const: watchdog 257 then: 258 properties: 259 groups: 260 enum: [watchdog] 261 - if: 262 properties: 263 function: 264 const: wifi 265 then: 266 properties: 267 groups: 268 enum: [wf0_2g, wf0_5g] 269 270 '^conf(-|$)': 271 type: object 272 additionalProperties: false 273 description: 274 pinconf configuration nodes. 275 $ref: /schemas/pinctrl/pincfg-node.yaml 276 277 properties: 278 groups: 279 description: 280 An array of strings. Each string contains the name of a group. 281 Valid values are the same as the pinmux node. 282 283 pins: 284 description: 285 An array of strings. Each string contains the name of a pin. 286 items: 287 enum: [GPIO_A, I2S1_IN, I2S1_OUT, I2S_BCLK, I2S_WS, I2S_MCLK, TXD0, 288 RXD0, SPI_WP, SPI_HOLD, SPI_CLK, SPI_MOSI, SPI_MISO, SPI_CS, 289 I2C_SDA, I2C_SCL, I2S2_IN, I2S3_IN, I2S4_IN, I2S2_OUT, 290 I2S3_OUT, I2S4_OUT, GPIO_B, MDC, MDIO, G2_TXD0, G2_TXD1, 291 G2_TXD2, G2_TXD3, G2_TXEN, G2_TXC, G2_RXD0, G2_RXD1, G2_RXD2, 292 G2_RXD3, G2_RXDV, G2_RXC, NCEB, NWEB, NREB, NDL4, NDL5, NDL6, 293 NDL7, NRB, NCLE, NALE, NDL0, NDL1, NDL2, NDL3, MDI_TP_P0, 294 MDI_TN_P0, MDI_RP_P0, MDI_RN_P0, MDI_TP_P1, MDI_TN_P1, 295 MDI_RP_P1, MDI_RN_P1, MDI_RP_P2, MDI_RN_P2, MDI_TP_P2, 296 MDI_TN_P2, MDI_TP_P3, MDI_TN_P3, MDI_RP_P3, MDI_RN_P3, 297 MDI_RP_P4, MDI_RN_P4, MDI_TP_P4, MDI_TN_P4, PMIC_SCL, 298 PMIC_SDA, SPIC1_CLK, SPIC1_MOSI, SPIC1_MISO, SPIC1_CS, 299 GPIO_D, WATCHDOG, RTS3_N, CTS3_N, TXD3, RXD3, PERST0_N, 300 PERST1_N, WLED_N, EPHY_LED0_N, AUXIN0, AUXIN1, AUXIN2, 301 AUXIN3, TXD4, RXD4, RTS4_N, CST4_N, PWM1, PWM2, PWM3, PWM4, 302 PWM5, PWM6, PWM7, GPIO_E, TOP_5G_CLK, TOP_5G_DATA, 303 WF0_5G_HB0, WF0_5G_HB1, WF0_5G_HB2, WF0_5G_HB3, WF0_5G_HB4, 304 WF0_5G_HB5, WF0_5G_HB6, XO_REQ, TOP_RST_N, SYS_WATCHDOG, 305 EPHY_LED0_N_JTDO, EPHY_LED1_N_JTDI, EPHY_LED2_N_JTMS, 306 EPHY_LED3_N_JTCLK, EPHY_LED4_N_JTRST_N, WF2G_LED_N, 307 WF5G_LED_N, GPIO_9, GPIO_10, GPIO_11, GPIO_12, UART1_TXD, 308 UART1_RXD, UART1_CTS, UART1_RTS, UART2_TXD, UART2_RXD, 309 UART2_CTS, UART2_RTS, SMI_MDC, SMI_MDIO, PCIE_PERESET_N, 310 PWM_0, GPIO_0, GPIO_1, GPIO_2, GPIO_3, GPIO_4, GPIO_5, 311 GPIO_6, GPIO_7, GPIO_8, UART0_TXD, UART0_RXD, TOP_2G_CLK, 312 TOP_2G_DATA, WF0_2G_HB0, WF0_2G_HB1, WF0_2G_HB2, WF0_2G_HB3, 313 WF0_2G_HB4, WF0_2G_HB5, WF0_2G_HB6] 314 315 bias-disable: true 316 317 bias-pull-up: true 318 319 bias-pull-down: true 320 321 input-enable: true 322 323 input-disable: true 324 325 output-enable: true 326 327 output-low: true 328 329 output-high: true 330 331 input-schmitt-enable: true 332 333 input-schmitt-disable: true 334 335 drive-strength: 336 enum: [4, 8, 12, 16] 337 338 slew-rate: 339 enum: [0, 1] 340 341 mediatek,tdsel: 342 description: 343 An integer describing the steps for output level shifter duty 344 cycle when asserted (high pulse width adjustment). Valid arguments 345 are from 0 to 15. 346 $ref: /schemas/types.yaml#/definitions/uint32 347 348 mediatek,rdsel: 349 description: 350 An integer describing the steps for input level shifter duty cycle 351 when asserted (high pulse width adjustment). Valid arguments are 352 from 0 to 63. 353 $ref: /schemas/types.yaml#/definitions/uint32 354 355 required: 356 - pins 357 358additionalProperties: false 359 360examples: 361 - | 362 #include <dt-bindings/interrupt-controller/irq.h> 363 #include <dt-bindings/interrupt-controller/arm-gic.h> 364 365 soc { 366 #address-cells = <2>; 367 #size-cells = <2>; 368 369 pio: pinctrl@10211000 { 370 compatible = "mediatek,mt7622-pinctrl"; 371 reg = <0 0x10211000 0 0x1000>, 372 <0 0x10005000 0 0x1000>; 373 gpio-controller; 374 #gpio-cells = <2>; 375 376 pinctrl_eth_default: eth-pins { 377 mux-mdio { 378 groups = "mdc_mdio"; 379 function = "eth"; 380 drive-strength = <12>; 381 }; 382 383 mux-gmac2 { 384 groups = "rgmii_via_gmac2"; 385 function = "eth"; 386 drive-strength = <12>; 387 }; 388 389 mux-esw { 390 groups = "esw"; 391 function = "eth"; 392 drive-strength = <8>; 393 }; 394 395 conf-mdio { 396 pins = "MDC"; 397 bias-pull-up; 398 }; 399 }; 400 }; 401 }; 402