xref: /linux/Documentation/devicetree/bindings/pinctrl/mediatek,mt6893-pinctrl.yaml (revision d30c1683aaecb93d2ab95685dc4300a33d3cea7a) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/mediatek,mt6893-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MediaTek MT6893 Pin Controller
8
9maintainers:
10  - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
11
12description:
13  The MediaTek's MT6893 Pin controller is used to control SoC pins.
14
15properties:
16  compatible:
17    const: mediatek,mt6893-pinctrl
18
19  reg:
20    items:
21      - description: pin controller base
22      - description: rm group IO
23      - description: bm group IO
24      - description: lm group IO
25      - description: lb group IO
26      - description: rt group IO
27      - description: lt group IO
28      - description: tm group IO
29      - description: External Interrupt (EINT) controller base
30
31  reg-names:
32    items:
33      - const: base
34      - const: rm
35      - const: bm
36      - const: lm
37      - const: lb
38      - const: rt
39      - const: lt
40      - const: tm
41      - const: eint
42
43  gpio-controller: true
44
45  '#gpio-cells':
46    description:
47      Number of cells in GPIO specifier. Since the generic GPIO binding is used,
48      the amount of cells must be specified as 2. See the below mentioned gpio
49      binding representation for description of particular cells.
50    const: 2
51
52  gpio-ranges:
53    maxItems: 1
54
55  gpio-line-names: true
56
57  interrupts:
58    description: The interrupt outputs to sysirq
59    maxItems: 1
60
61  interrupt-controller: true
62
63  '#interrupt-cells':
64    const: 2
65
66# PIN CONFIGURATION NODES
67patternProperties:
68  '-pins$':
69    type: object
70    additionalProperties: false
71
72    patternProperties:
73      '^pins':
74        type: object
75        allOf:
76          - $ref: /schemas/pinctrl/pincfg-node.yaml
77          - $ref: /schemas/pinctrl/pinmux-node.yaml
78        description:
79          A pinctrl node should contain at least one subnodes representing the
80          pinctrl groups available on the machine. Each subnode will list the
81          pins it needs, and how they should be configured, with regard to muxer
82          configuration, pullups, drive strength, input enable/disable and input
83          schmitt.
84
85        properties:
86          pinmux:
87            description:
88              Integer array, represents gpio pin number and mux setting.
89              Supported pin number and mux are defined as macros in
90              arch/arm64/boot/dts/mediatek/mt8196-pinfunc.h for this SoC.
91
92          drive-strength:
93            enum: [2, 4, 6, 8, 10, 12, 14, 16]
94
95          drive-strength-microamp:
96            enum: [125, 250, 500, 1000]
97
98          bias-pull-down:
99            oneOf:
100              - type: boolean
101              - enum: [75000, 5000]
102                description: Pull down RSEL type resistance values (in ohms)
103            description:
104              For normal pull down type there is no need to specify a resistance
105              value, hence this can be specified as a boolean property.
106              For RSEL pull down type a resistance value (in ohms) can be added.
107
108          bias-pull-up:
109            oneOf:
110              - type: boolean
111              - enum: [10000, 5000, 4000, 3000]
112                description: Pull up RSEL type resistance values (in ohms)
113            description:
114              For normal pull up type there is no need to specify a resistance
115              value, hence this can be specified as a boolean property.
116              For RSEL pull up type a resistance value (in ohms) can be added.
117
118          bias-disable: true
119
120          output-high: true
121
122          output-low: true
123
124          input-enable: true
125
126          input-disable: true
127
128          input-schmitt-enable: true
129
130          input-schmitt-disable: true
131
132        required:
133          - pinmux
134
135        additionalProperties: false
136
137required:
138  - compatible
139  - reg
140  - interrupts
141  - interrupt-controller
142  - '#interrupt-cells'
143  - gpio-controller
144  - '#gpio-cells'
145  - gpio-ranges
146
147additionalProperties: false
148
149examples:
150  - |
151    #include <dt-bindings/interrupt-controller/arm-gic.h>
152    #include <dt-bindings/pinctrl/mt65xx.h>
153    #define PINMUX_GPIO0__FUNC_GPIO0 (MTK_PIN_NO(0) | 0)
154    #define PINMUX_GPIO99__FUNC_SCL0 (MTK_PIN_NO(99) | 1)
155    #define PINMUX_GPIO100__FUNC_SDA0 (MTK_PIN_NO(100) | 1)
156
157    pio: pinctrl@10005000 {
158        compatible = "mediatek,mt6893-pinctrl";
159        reg = <0x10005000 0x1000>,
160              <0x11c20000 0x0200>,
161              <0x11d10000 0x0200>,
162              <0x11e20000 0x0200>,
163              <0x11e70000 0x0200>,
164              <0x11ea0000 0x0200>,
165              <0x11f20000 0x0200>,
166              <0x11f30000 0x0200>,
167              <0x1100b000 0x1000>;
168        reg-names = "base", "rm", "bm", "lm", "lb", "rt",
169                    "lt", "tm", "eint";
170        gpio-controller;
171        #gpio-cells = <2>;
172        gpio-ranges = <&pio 0 0 220>;
173        interrupt-controller;
174        interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 0>;
175        #interrupt-cells = <2>;
176
177        gpio-pins {
178            pins {
179                pinmux = <PINMUX_GPIO0__FUNC_GPIO0>;
180                bias-pull-up = <4000>;
181                drive-strength = <6>;
182            };
183        };
184
185        i2c0-pins {
186            pins-bus {
187                pinmux = <PINMUX_GPIO99__FUNC_SCL0>,
188                         <PINMUX_GPIO100__FUNC_SDA0>;
189                bias-pull-down = <75000>;
190                drive-strength-microamp = <1000>;
191            };
192        };
193    };
194