1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/mediatek,mt7986-pinctrl.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Mediatek MT7986 Pin Controller Device Tree Bindings 8 9maintainers: 10 - Sean Wang <sean.wang@kernel.org> 11 12description: |+ 13 The MediaTek's MT7986 Pin controller is used to control SoC pins. 14 15properties: 16 compatible: 17 enum: 18 - mediatek,mt7986a-pinctrl 19 - mediatek,mt7986b-pinctrl 20 21 reg: 22 minItems: 8 23 maxItems: 8 24 25 reg-names: 26 items: 27 - const: gpio 28 - const: iocfg_rt 29 - const: iocfg_rb 30 - const: iocfg_lt 31 - const: iocfg_lb 32 - const: iocfg_tr 33 - const: iocfg_tl 34 - const: eint 35 36 gpio-controller: true 37 38 "#gpio-cells": 39 const: 2 40 description: | 41 Number of cells in GPIO specifier. Since the generic GPIO 42 binding is used, the amount of cells must be specified as 2. See the below 43 mentioned gpio binding representation for description of particular cells. 44 45 gpio-ranges: 46 minItems: 1 47 maxItems: 5 48 description: | 49 GPIO valid number range. 50 51 interrupt-controller: true 52 53 interrupts: 54 maxItems: 1 55 56 "#interrupt-cells": 57 const: 2 58 59required: 60 - compatible 61 - reg 62 - reg-names 63 - gpio-controller 64 - "#gpio-cells" 65 66patternProperties: 67 '-pins$': 68 type: object 69 additionalProperties: false 70 71 patternProperties: 72 '.*mux.*': 73 type: object 74 additionalProperties: false 75 description: | 76 pinmux configuration nodes. 77 78 The following table shows the effective values of "group", "function" 79 properties and chip pinout pins 80 81 groups function pins (in pin#) 82 --------------------------------------------------------------------- 83 "watchdog" "watchdog" 0 84 "wifi_led" "led" 1, 2 85 "i2c" "i2c" 3, 4 86 "uart1_0" "uart" 7, 8, 9, 10 87 "pcie_clk" "pcie" 9 88 "pcie_wake" "pcie" 10 89 "spi1_0" "spi" 11, 12, 13, 14 90 "pwm1_1" "pwm" 20, 91 "pwm0" "pwm" 21, 92 "pwm1_0" "pwm" 22, 93 "snfi" "flash" 23, 24, 25, 26, 27, 28 94 "spi1_2" "spi" 29, 30, 31, 32 95 "emmc_45" "emmc" 22, 23, 24, 25, 26, 27, 28, 29, 30, 96 31, 32 97 "spi1_1" "spi" 23, 24, 25, 26 98 "uart1_2" "uart" 29, 30, 31, 32 99 "uart1_1" "uart" 23, 24, 25, 26 100 "uart2_0" "uart" 29, 30, 31, 32 101 "spi0" "spi" 33, 34, 35, 36 102 "spi0_wp_hold" "spi" 37, 38 103 "uart1_3_rx_tx" "uart" 35, 36 104 "uart1_3_cts_rts" "uart" 37, 38 105 "uart2_1" "uart" 33, 34, 35, 36 106 "spi1_3" "spi" 33, 34, 35, 36 107 "uart0" "uart" 39, 40 108 "pcie_pereset" "pcie" 41 109 "uart1" "uart" 42, 43, 44, 45 110 "uart2" "uart" 46, 47, 48, 49 111 "emmc_51" "emmc" 50, 51, 52, 53, 54, 55, 56, 57, 57, 112 59, 60, 61 113 "pcm" "audio" 62, 63, 64, 65 114 "i2s" "audio" 62, 63, 64, 65 115 "switch_int" "eth" 66 116 "mdc_mdio" "eth" 67 117 118 $ref: "/schemas/pinctrl/pinmux-node.yaml" 119 properties: 120 function: 121 description: | 122 A string containing the name of the function to mux to the group. 123 There is no "audio", "pcie" functions on mt7986b, you can only use 124 those functions on mt7986a. 125 enum: [audio, emmc, eth, i2c, led, flash, pcie, pwm, spi, uart, 126 watchdog, wifi] 127 groups: 128 description: | 129 An array of strings. Each string contains the name of a group. 130 There is no "pcie_pereset", "uart1", "uart2" "emmc_51", "pcm", 131 and "i2s" groups on mt7986b, you can only use those groups on 132 mt7986a. 133 required: 134 - function 135 - groups 136 137 allOf: 138 - if: 139 properties: 140 function: 141 const: audio 142 then: 143 properties: 144 groups: 145 enum: [pcm, i2s] 146 - if: 147 properties: 148 function: 149 const: emmc 150 then: 151 properties: 152 groups: 153 enum: [emmc, emmc_rst] 154 - if: 155 properties: 156 function: 157 const: eth 158 then: 159 properties: 160 groups: 161 enum: [switch_int, mdc_mdio] 162 - if: 163 properties: 164 function: 165 const: i2c 166 then: 167 properties: 168 groups: 169 enum: [i2c] 170 - if: 171 properties: 172 function: 173 const: led 174 then: 175 properties: 176 groups: 177 enum: [wifi_led] 178 - if: 179 properties: 180 function: 181 const: flash 182 then: 183 properties: 184 groups: 185 enum: [snfi] 186 - if: 187 properties: 188 function: 189 const: pcie 190 then: 191 properties: 192 groups: 193 enum: [pcie_clk, pcie_wake, pcie_pereset] 194 - if: 195 properties: 196 function: 197 const: pwm 198 then: 199 properties: 200 groups: 201 enum: [pwm0, pwm1_0, pwm1_1] 202 - if: 203 properties: 204 function: 205 const: spi 206 then: 207 properties: 208 groups: 209 enum: [spi0, spi0_wp_hold, spi1_0, spi1_1, spi1_2, spi1_3] 210 - if: 211 properties: 212 function: 213 const: uart 214 then: 215 properties: 216 groups: 217 enum: [uart1_0, uart1_1, uart1_2, uart1_3_rx_tx, 218 uart1_3_cts_rts, uart2_0, uart2_1, uart0, uart1, uart2] 219 - if: 220 properties: 221 function: 222 const: watchdog 223 then: 224 properties: 225 groups: 226 enum: [watchdog] 227 - if: 228 properties: 229 function: 230 const: wifi 231 then: 232 properties: 233 groups: 234 enum: [wf_2g, wf_5g, wf_dbdc] 235 '.*conf.*': 236 type: object 237 additionalProperties: false 238 description: | 239 pinconf configuration nodes. 240 $ref: "/schemas/pinctrl/pincfg-node.yaml" 241 242 properties: 243 pins: 244 description: | 245 An array of strings. Each string contains the name of a pin. 246 There is no PIN 41 to PIN 65 above on mt7686b, you can only use 247 those pins on mt7986a. 248 enum: [SYS_WATCHDOG, WF2G_LED, WF5G_LED, I2C_SCL, I2C_SDA, GPIO_0, 249 GPIO_1, GPIO_2, GPIO_3, GPIO_4, GPIO_5, GPIO_6, GPIO_7, 250 GPIO_8, GPIO_9, GPIO_10, GPIO_11, GPIO_12, GPIO_13, GPIO_14, 251 GPIO_15, PWM0, PWM1, SPI0_CLK, SPI0_MOSI, SPI0_MISO, SPI0_CS, 252 SPI0_HOLD, SPI0_WP, SPI1_CLK, SPI1_MOSI, SPI1_MISO, SPI1_CS, 253 SPI2_CLK, SPI2_MOSI, SPI2_MISO, SPI2_CS, SPI2_HOLD, SPI2_WP, 254 UART0_RXD, UART0_TXD, PCIE_PERESET_N, UART1_RXD, UART1_TXD, 255 UART1_CTS, UART1_RTS, UART2_RXD, UART2_TXD, UART2_CTS, 256 UART2_RTS, EMMC_DATA_0, EMMC_DATA_1, EMMC_DATA_2, 257 EMMC_DATA_3, EMMC_DATA_4, EMMC_DATA_5, EMMC_DATA_6, 258 EMMC_DATA_7, EMMC_CMD, EMMC_CK, EMMC_DSL, EMMC_RSTB, PCM_DTX, 259 PCM_DRX, PCM_CLK, PCM_FS, MT7531_INT, SMI_MDC, SMI_MDIO, 260 WF0_DIG_RESETB, WF0_CBA_RESETB, WF0_XO_REQ, WF0_TOP_CLK, 261 WF0_TOP_DATA, WF0_HB1, WF0_HB2, WF0_HB3, WF0_HB4, WF0_HB0, 262 WF0_HB0_B, WF0_HB5, WF0_HB6, WF0_HB7, WF0_HB8, WF0_HB9, 263 WF0_HB10, WF1_DIG_RESETB, WF1_CBA_RESETB, WF1_XO_REQ, 264 WF1_TOP_CLK, WF1_TOP_DATA, WF1_HB1, WF1_HB2, WF1_HB3, 265 WF1_HB4, WF1_HB0, WF1_HB0_B, WF1_HB5, WF1_HB6, WF1_HB7, 266 WF1_HB8] 267 268 bias-disable: true 269 270 bias-pull-up: true 271 272 bias-pull-down: true 273 274 input-enable: true 275 276 input-disable: true 277 278 output-enable: true 279 280 output-low: true 281 282 output-high: true 283 284 input-schmitt-enable: true 285 286 input-schmitt-disable: true 287 288 drive-strength: 289 enum: [2, 4, 6, 8, 10, 12, 14, 16] 290 291 mediatek,pull-up-adv: 292 description: | 293 Valid arguments for 'mediatek,pull-up-adv' are '0', '1', '2', '3' 294 Pull up setings for 2 pull resistors, R0 and R1. Valid arguments 295 are described as below: 296 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 297 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 298 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 299 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled. 300 $ref: /schemas/types.yaml#/definitions/uint32 301 enum: [0, 1, 2, 3] 302 303 mediatek,pull-down-adv: 304 description: | 305 Valid arguments for 'mediatek,pull-up-adv' are '0', '1', '2', '3' 306 Pull down setings for 2 pull resistors, R0 and R1. Valid arguments 307 are described as below: 308 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 309 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 310 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 311 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled. 312 $ref: /schemas/types.yaml#/definitions/uint32 313 enum: [0, 1, 2, 3] 314 315 required: 316 - pins 317 318additionalProperties: false 319 320examples: 321 - | 322 #include <dt-bindings/interrupt-controller/irq.h> 323 #include <dt-bindings/interrupt-controller/arm-gic.h> 324 325 soc { 326 #address-cells = <2>; 327 #size-cells = <2>; 328 pio: pinctrl@1001f000 { 329 compatible = "mediatek,mt7986a-pinctrl"; 330 reg = <0 0x1001f000 0 0x1000>, 331 <0 0x11c30000 0 0x1000>, 332 <0 0x11c40000 0 0x1000>, 333 <0 0x11e20000 0 0x1000>, 334 <0 0x11e30000 0 0x1000>, 335 <0 0x11f00000 0 0x1000>, 336 <0 0x11f10000 0 0x1000>, 337 <0 0x1000b000 0 0x1000>; 338 reg-names = "gpio", "iocfg_rt", "iocfg_rb", "iocfg_lt", 339 "iocfg_lb", "iocfg_tr", "iocfg_tl", "eint"; 340 gpio-controller; 341 #gpio-cells = <2>; 342 gpio-ranges = <&pio 0 0 100>; 343 interrupt-controller; 344 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 345 interrupt-parent = <&gic>; 346 #interrupt-cells = <2>; 347 348 uart1_pins: uart1-pins { 349 mux { 350 function = "uart"; 351 groups = "uart1"; 352 }; 353 }; 354 355 uart2_pins: uart2-pins { 356 mux { 357 function = "uart"; 358 groups = "uart2"; 359 }; 360 }; 361 362 }; 363 }; 364