1d4059de4SDaniel Golle# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2d4059de4SDaniel Golle%YAML 1.2 3d4059de4SDaniel Golle--- 4d4059de4SDaniel Golle$id: http://devicetree.org/schemas/pinctrl/mediatek,mt7981-pinctrl.yaml# 5d4059de4SDaniel Golle$schema: http://devicetree.org/meta-schemas/core.yaml# 6d4059de4SDaniel Golle 7*a9d44c4cSArınç ÜNALtitle: MediaTek MT7981 Pin Controller 8d4059de4SDaniel Golle 9d4059de4SDaniel Gollemaintainers: 10d4059de4SDaniel Golle - Daniel Golle <daniel@makrotopia.org> 11d4059de4SDaniel Golle 12d4059de4SDaniel Golledescription: 13d4059de4SDaniel Golle The MediaTek's MT7981 Pin controller is used to control SoC pins. 14d4059de4SDaniel Golle 15d4059de4SDaniel Golleproperties: 16d4059de4SDaniel Golle compatible: 17d4059de4SDaniel Golle enum: 18d4059de4SDaniel Golle - mediatek,mt7981-pinctrl 19d4059de4SDaniel Golle 20d4059de4SDaniel Golle reg: 21d4059de4SDaniel Golle minItems: 9 22d4059de4SDaniel Golle maxItems: 9 23d4059de4SDaniel Golle 24d4059de4SDaniel Golle reg-names: 25d4059de4SDaniel Golle items: 26d4059de4SDaniel Golle - const: gpio 27d4059de4SDaniel Golle - const: iocfg_rt 28d4059de4SDaniel Golle - const: iocfg_rm 29d4059de4SDaniel Golle - const: iocfg_rb 30d4059de4SDaniel Golle - const: iocfg_lb 31d4059de4SDaniel Golle - const: iocfg_bl 32d4059de4SDaniel Golle - const: iocfg_tm 33d4059de4SDaniel Golle - const: iocfg_tl 34d4059de4SDaniel Golle - const: eint 35d4059de4SDaniel Golle 36d4059de4SDaniel Golle gpio-controller: true 37d4059de4SDaniel Golle 38d4059de4SDaniel Golle "#gpio-cells": 39d4059de4SDaniel Golle const: 2 40d4059de4SDaniel Golle description: > 41d4059de4SDaniel Golle Number of cells in GPIO specifier. Since the generic GPIO binding is used, 42d4059de4SDaniel Golle the amount of cells must be specified as 2. See the below mentioned gpio 43d4059de4SDaniel Golle binding representation for description of particular cells. 44d4059de4SDaniel Golle 45d4059de4SDaniel Golle gpio-ranges: 46d4059de4SDaniel Golle minItems: 1 47d4059de4SDaniel Golle maxItems: 5 48d4059de4SDaniel Golle description: GPIO valid number range. 49d4059de4SDaniel Golle 50d4059de4SDaniel Golle interrupt-controller: true 51d4059de4SDaniel Golle 52d4059de4SDaniel Golle interrupts: 53d4059de4SDaniel Golle maxItems: 1 54d4059de4SDaniel Golle 55d4059de4SDaniel Golle "#interrupt-cells": 56d4059de4SDaniel Golle const: 2 57d4059de4SDaniel Golle 58d4059de4SDaniel GolleallOf: 59d4059de4SDaniel Golle - $ref: pinctrl.yaml# 60d4059de4SDaniel Golle 61d4059de4SDaniel Gollerequired: 62d4059de4SDaniel Golle - compatible 63d4059de4SDaniel Golle - reg 64d4059de4SDaniel Golle - reg-names 65d4059de4SDaniel Golle - gpio-controller 66d4059de4SDaniel Golle - "#gpio-cells" 67d4059de4SDaniel Golle 68d4059de4SDaniel GollepatternProperties: 69d4059de4SDaniel Golle '-pins$': 70d4059de4SDaniel Golle type: object 71d4059de4SDaniel Golle additionalProperties: false 72d4059de4SDaniel Golle 73d4059de4SDaniel Golle patternProperties: 74d4059de4SDaniel Golle '^.*mux.*$': 75d4059de4SDaniel Golle type: object 76d4059de4SDaniel Golle additionalProperties: false 77d4059de4SDaniel Golle description: | 78d4059de4SDaniel Golle pinmux configuration nodes. 79d4059de4SDaniel Golle 80d4059de4SDaniel Golle The following table shows the effective values of "group", "function" 81d4059de4SDaniel Golle properties and chip pinout pins 82d4059de4SDaniel Golle 83d4059de4SDaniel Golle groups function pins (in pin#) 84d4059de4SDaniel Golle --------------------------------------------------------------------- 85d4059de4SDaniel Golle "wa_aice1" "wa_aice" 0, 1 86d4059de4SDaniel Golle "wa_aice2" "wa_aice" 0, 1 87d4059de4SDaniel Golle "wm_uart_0" "uart" 0, 1 88d4059de4SDaniel Golle "dfd" "dfd" 0, 1, 4, 5 89d4059de4SDaniel Golle "watchdog" "watchdog" 2 90d4059de4SDaniel Golle "pcie_pereset" "pcie" 3 91d4059de4SDaniel Golle "jtag" "jtag" 4, 5, 6, 7, 8 92d4059de4SDaniel Golle "wm_jtag_0" "jtag" 4, 5, 6, 7, 8 93d4059de4SDaniel Golle "wo0_jtag_0" "jtag" 9, 10, 11, 12, 13 94d4059de4SDaniel Golle "uart2_0" "uart" 4, 5, 6, 7 95d4059de4SDaniel Golle "gbe_led0" "led" 8 96d4059de4SDaniel Golle "pta_ext_0" "pta" 4, 5, 6 97d4059de4SDaniel Golle "pwm2" "pwm" 7 98d4059de4SDaniel Golle "net_wo0_uart_txd_0" "uart" 8 99d4059de4SDaniel Golle "spi1_0" "spi" 4, 5, 6, 7 100d4059de4SDaniel Golle "i2c0_0" "i2c" 6, 7 101d4059de4SDaniel Golle "dfd_ntrst" "dfd" 8 102d4059de4SDaniel Golle "wm_aice1" "wa_aice" 9, 10 103d4059de4SDaniel Golle "pwm0_0" "pwm" 13 104d4059de4SDaniel Golle "pwm0_1" "pwm" 15 105d4059de4SDaniel Golle "pwm1_0" "pwm" 14 106d4059de4SDaniel Golle "pwm1_1" "pwm" 15 107d4059de4SDaniel Golle "net_wo0_uart_txd_1" "uart" 14 108d4059de4SDaniel Golle "net_wo0_uart_txd_2" "uart" 15 109d4059de4SDaniel Golle "gbe_led1" "led" 13 110d4059de4SDaniel Golle "pcm" "pcm" 9, 10, 11, 12, 13, 25 111d4059de4SDaniel Golle "watchdog1" "watchdog" 13 112d4059de4SDaniel Golle "udi" "udi" 9, 10, 11, 12, 13 113d4059de4SDaniel Golle "drv_vbus" "usb" 14 114d4059de4SDaniel Golle "emmc_45" "flash" 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25 115d4059de4SDaniel Golle "snfi" "flash" 16, 17, 18, 19, 20, 21 116d4059de4SDaniel Golle "spi0" "spi" 16, 17, 18, 19 117d4059de4SDaniel Golle "spi0_wp_hold" "spi" 20, 21 118d4059de4SDaniel Golle "spi1_1" "spi" 22, 23, 24, 25 119d4059de4SDaniel Golle "spi2" "spi" 26, 27, 28, 29 120d4059de4SDaniel Golle "spi2_wp_hold" "spi" 30, 31 121d4059de4SDaniel Golle "uart1_0" "uart" 16, 17, 18, 19 122d4059de4SDaniel Golle "uart1_1" "uart" 26, 27, 28, 29 123d4059de4SDaniel Golle "uart2_1" "uart" 22, 23, 24, 25 124d4059de4SDaniel Golle "pta_ext_1" "pta" 22, 23, 24 125d4059de4SDaniel Golle "wm_aurt_1" "uart" 20, 21 126d4059de4SDaniel Golle "wm_aurt_2" "uart" 30, 31 127d4059de4SDaniel Golle "wm_jtag_1" "jtag" 20, 21, 22, 23, 24 128d4059de4SDaniel Golle "wo0_jtag_1" "jtag" 25, 26, 27, 28, 29 129d4059de4SDaniel Golle "wa_aice3" "wa_aice" 28, 20 130d4059de4SDaniel Golle "wm_aice2" "wa_aice" 30, 31 131d4059de4SDaniel Golle "i2c0_1" "i2c" 30, 31 132d4059de4SDaniel Golle "u2_phy_i2c" "i2c" 30, 31 133d4059de4SDaniel Golle "uart0" "uart" 32, 33 134d4059de4SDaniel Golle "sgmii1_phy_i2c" "i2c" 32, 33 135d4059de4SDaniel Golle "u3_phy_i2c" "i2c" 32, 33 136d4059de4SDaniel Golle "sgmii0_phy_i2c" "i2c" 32, 33 137d4059de4SDaniel Golle "pcie_clk" "pcie" 34 138d4059de4SDaniel Golle "pcie_wake" "pcie" 35 139d4059de4SDaniel Golle "i2c0_2" "i2c" 36, 37 140d4059de4SDaniel Golle "smi_mdc_mdio" "eth" 36, 37 141d4059de4SDaniel Golle "gbe_ext_mdc_mdio" "eth" 36, 37 142d4059de4SDaniel Golle "wf0_mode1" "eth" 40, 41, 42, 43, 44, 45, 46, 47, 48, 143d4059de4SDaniel Golle 49, 50, 51, 52, 53, 54, 55, 56 144d4059de4SDaniel Golle 145d4059de4SDaniel Golle "wf0_mode3" "eth" 45, 46, 47, 48, 49, 51 146d4059de4SDaniel Golle "wf2g_led0" "led" 30 147d4059de4SDaniel Golle "wf2g_led1" "led" 34 148d4059de4SDaniel Golle "wf5g_led0" "led" 31 149d4059de4SDaniel Golle "wf5g_led1" "led" 35 150d4059de4SDaniel Golle "mt7531_int" "eth" 38 151d4059de4SDaniel Golle "ant_sel" "ant" 14, 15, 16, 17, 18, 19, 20, 21, 22 152d4059de4SDaniel Golle 23, 24, 25, 34, 35 153d4059de4SDaniel Golle 154d4059de4SDaniel Golle $ref: /schemas/pinctrl/pinmux-node.yaml 155d4059de4SDaniel Golle properties: 156d4059de4SDaniel Golle function: 157d4059de4SDaniel Golle description: 158d4059de4SDaniel Golle A string containing the name of the function to mux to the group. 159d4059de4SDaniel Golle enum: [wa_aice, dfd, jtag, pta, pcm, udi, usb, ant, eth, i2c, led, 160d4059de4SDaniel Golle pwm, spi, uart, watchdog, flash, pcie] 161d4059de4SDaniel Golle groups: 162d4059de4SDaniel Golle description: 163d4059de4SDaniel Golle An array of strings. Each string contains the name of a group. 164d4059de4SDaniel Golle 165d4059de4SDaniel Golle required: 166d4059de4SDaniel Golle - function 167d4059de4SDaniel Golle - groups 168d4059de4SDaniel Golle 169d4059de4SDaniel Golle allOf: 170d4059de4SDaniel Golle - if: 171d4059de4SDaniel Golle properties: 172d4059de4SDaniel Golle function: 173d4059de4SDaniel Golle const: wa_aice 174d4059de4SDaniel Golle then: 175d4059de4SDaniel Golle properties: 176d4059de4SDaniel Golle groups: 177d4059de4SDaniel Golle enum: [wa_aice1, wa_aice2, wm_aice1_1, wa_aice3, wm_aice1_2] 178d4059de4SDaniel Golle - if: 179d4059de4SDaniel Golle properties: 180d4059de4SDaniel Golle function: 181d4059de4SDaniel Golle const: dfd 182d4059de4SDaniel Golle then: 183d4059de4SDaniel Golle properties: 184d4059de4SDaniel Golle groups: 185d4059de4SDaniel Golle enum: [dfd, dfd_ntrst] 186d4059de4SDaniel Golle - if: 187d4059de4SDaniel Golle properties: 188d4059de4SDaniel Golle function: 189d4059de4SDaniel Golle const: jtag 190d4059de4SDaniel Golle then: 191d4059de4SDaniel Golle properties: 192d4059de4SDaniel Golle groups: 193d4059de4SDaniel Golle enum: [jtag, wm_jtag_0, wo0_jtag_0, wo0_jtag_1, wm_jtag_1] 194d4059de4SDaniel Golle - if: 195d4059de4SDaniel Golle properties: 196d4059de4SDaniel Golle function: 197d4059de4SDaniel Golle const: pta 198d4059de4SDaniel Golle then: 199d4059de4SDaniel Golle properties: 200d4059de4SDaniel Golle groups: 201d4059de4SDaniel Golle enum: [pta_ext_0, pta_ext_1] 202d4059de4SDaniel Golle - if: 203d4059de4SDaniel Golle properties: 204d4059de4SDaniel Golle function: 205d4059de4SDaniel Golle const: pcm 206d4059de4SDaniel Golle then: 207d4059de4SDaniel Golle properties: 208d4059de4SDaniel Golle groups: 209d4059de4SDaniel Golle enum: [pcm] 210d4059de4SDaniel Golle - if: 211d4059de4SDaniel Golle properties: 212d4059de4SDaniel Golle function: 213d4059de4SDaniel Golle const: udi 214d4059de4SDaniel Golle then: 215d4059de4SDaniel Golle properties: 216d4059de4SDaniel Golle groups: 217d4059de4SDaniel Golle enum: [udi] 218d4059de4SDaniel Golle - if: 219d4059de4SDaniel Golle properties: 220d4059de4SDaniel Golle function: 221d4059de4SDaniel Golle const: usb 222d4059de4SDaniel Golle then: 223d4059de4SDaniel Golle properties: 224d4059de4SDaniel Golle groups: 225d4059de4SDaniel Golle enum: [drv_vbus] 226d4059de4SDaniel Golle - if: 227d4059de4SDaniel Golle properties: 228d4059de4SDaniel Golle function: 229d4059de4SDaniel Golle const: ant 230d4059de4SDaniel Golle then: 231d4059de4SDaniel Golle properties: 232d4059de4SDaniel Golle groups: 233d4059de4SDaniel Golle enum: [ant_sel] 234d4059de4SDaniel Golle - if: 235d4059de4SDaniel Golle properties: 236d4059de4SDaniel Golle function: 237d4059de4SDaniel Golle const: eth 238d4059de4SDaniel Golle then: 239d4059de4SDaniel Golle properties: 240d4059de4SDaniel Golle groups: 241d4059de4SDaniel Golle enum: [smi_mdc_mdio, gbe_ext_mdc_mdio, wf0_mode1, wf0_mode3, 242d4059de4SDaniel Golle mt7531_int] 243d4059de4SDaniel Golle - if: 244d4059de4SDaniel Golle properties: 245d4059de4SDaniel Golle function: 246d4059de4SDaniel Golle const: i2c 247d4059de4SDaniel Golle then: 248d4059de4SDaniel Golle properties: 249d4059de4SDaniel Golle groups: 250d4059de4SDaniel Golle enum: [i2c0_0, i2c0_1, u2_phy_i2c, sgmii1_phy_i2c, u3_phy_i2c, 251d4059de4SDaniel Golle sgmii0_phy_i2c, i2c0_2] 252d4059de4SDaniel Golle - if: 253d4059de4SDaniel Golle properties: 254d4059de4SDaniel Golle function: 255d4059de4SDaniel Golle const: led 256d4059de4SDaniel Golle then: 257d4059de4SDaniel Golle properties: 258d4059de4SDaniel Golle groups: 259d4059de4SDaniel Golle enum: [gbe_led0, gbe_led1, wf2g_led0, wf2g_led1, wf5g_led0, wf5g_led1] 260d4059de4SDaniel Golle - if: 261d4059de4SDaniel Golle properties: 262d4059de4SDaniel Golle function: 263d4059de4SDaniel Golle const: pwm 264d4059de4SDaniel Golle then: 265d4059de4SDaniel Golle properties: 266d4059de4SDaniel Golle groups: 267d4059de4SDaniel Golle items: 268d4059de4SDaniel Golle enum: [pwm2, pwm0_0, pwm0_1, pwm1_0, pwm1_1] 269d4059de4SDaniel Golle maxItems: 3 270d4059de4SDaniel Golle - if: 271d4059de4SDaniel Golle properties: 272d4059de4SDaniel Golle function: 273d4059de4SDaniel Golle const: spi 274d4059de4SDaniel Golle then: 275d4059de4SDaniel Golle properties: 276d4059de4SDaniel Golle groups: 277d4059de4SDaniel Golle items: 278d4059de4SDaniel Golle enum: [spi1_0, spi0, spi0_wp_hold, spi1_1, spi2, spi2_wp_hold] 279d4059de4SDaniel Golle maxItems: 4 280d4059de4SDaniel Golle - if: 281d4059de4SDaniel Golle properties: 282d4059de4SDaniel Golle function: 283d4059de4SDaniel Golle const: uart 284d4059de4SDaniel Golle then: 285d4059de4SDaniel Golle properties: 286d4059de4SDaniel Golle groups: 287d4059de4SDaniel Golle items: 288d4059de4SDaniel Golle enum: [wm_uart_0, uart2_0, net_wo0_uart_txd_0, 289d4059de4SDaniel Golle net_wo0_uart_txd_1, net_wo0_uart_txd_2, uart1_0, 290d4059de4SDaniel Golle uart1_1, uart2_1, wm_aurt_1, wm_aurt_2, uart0] 291d4059de4SDaniel Golle - if: 292d4059de4SDaniel Golle properties: 293d4059de4SDaniel Golle function: 294d4059de4SDaniel Golle const: watchdog 295d4059de4SDaniel Golle then: 296d4059de4SDaniel Golle properties: 297d4059de4SDaniel Golle groups: 298d4059de4SDaniel Golle enum: [watchdog] 299d4059de4SDaniel Golle - if: 300d4059de4SDaniel Golle properties: 301d4059de4SDaniel Golle function: 302d4059de4SDaniel Golle const: flash 303d4059de4SDaniel Golle then: 304d4059de4SDaniel Golle properties: 305d4059de4SDaniel Golle groups: 306d4059de4SDaniel Golle items: 307d4059de4SDaniel Golle enum: [emmc_45, snfi] 308d4059de4SDaniel Golle maxItems: 1 309d4059de4SDaniel Golle - if: 310d4059de4SDaniel Golle properties: 311d4059de4SDaniel Golle function: 312d4059de4SDaniel Golle const: pcie 313d4059de4SDaniel Golle then: 314d4059de4SDaniel Golle properties: 315d4059de4SDaniel Golle groups: 316d4059de4SDaniel Golle items: 317d4059de4SDaniel Golle enum: [pcie_clk, pcie_wake, pcie_pereset] 318d4059de4SDaniel Golle maxItems: 3 319d4059de4SDaniel Golle 320d4059de4SDaniel Golle '^.*conf.*$': 321d4059de4SDaniel Golle type: object 322d4059de4SDaniel Golle additionalProperties: false 323d4059de4SDaniel Golle description: pinconf configuration nodes. 324d4059de4SDaniel Golle $ref: /schemas/pinctrl/pincfg-node.yaml 325d4059de4SDaniel Golle 326d4059de4SDaniel Golle properties: 327d4059de4SDaniel Golle pins: 328d4059de4SDaniel Golle description: 329d4059de4SDaniel Golle An array of strings. Each string contains the name of a pin. 330d4059de4SDaniel Golle items: 331d4059de4SDaniel Golle enum: [GPIO_WPS, GPIO_RESET, SYS_WATCHDOG, PCIE_PERESET_N, 332d4059de4SDaniel Golle JTAG_JTDO, JTAG_JTDI, JTAG_JTMS, JTAG_JTCLK, JTAG_JTRST_N, 333d4059de4SDaniel Golle WO_JTAG_JTDO, WO_JTAG_JTDI, WO_JTAG_JTMS, WO_JTAG_JTCLK, 334d4059de4SDaniel Golle WO_JTAG_JTRST_N, USB_VBUS, PWM0, SPI0_CLK, SPI0_MOSI, 335d4059de4SDaniel Golle SPI0_MISO, SPI0_CS, SPI0_HOLD, SPI0_WP, SPI1_CLK, SPI1_MOSI, 336d4059de4SDaniel Golle SPI1_MISO, SPI1_CS, SPI2_CLK, SPI2_MOSI, SPI2_MISO, SPI2_CS, 337d4059de4SDaniel Golle SPI2_HOLD, SPI2_WP, UART0_RXD, UART0_TXD, PCIE_CLK_REQ, 338d4059de4SDaniel Golle PCIE_WAKE_N, SMI_MDC, SMI_MDIO, GBE_INT, GBE_RESET, 339d4059de4SDaniel Golle WF_DIG_RESETB, WF_CBA_RESETB, WF_XO_REQ, WF_TOP_CLK, 340d4059de4SDaniel Golle WF_TOP_DATA, WF_HB1, WF_HB2, WF_HB3, WF_HB4, WF_HB0, 341d4059de4SDaniel Golle WF_HB0_B, WF_HB5, WF_HB6, WF_HB7, WF_HB8, WF_HB9, WF_HB10] 342d4059de4SDaniel Golle maxItems: 57 343d4059de4SDaniel Golle 344d4059de4SDaniel Golle bias-disable: true 345d4059de4SDaniel Golle 346d4059de4SDaniel Golle bias-pull-up: 347d4059de4SDaniel Golle oneOf: 348d4059de4SDaniel Golle - type: boolean 349d4059de4SDaniel Golle description: normal pull up. 350d4059de4SDaniel Golle - enum: [100, 101, 102, 103] 351d4059de4SDaniel Golle description: > 352d4059de4SDaniel Golle PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in 353d4059de4SDaniel Golle dt-bindings/pinctrl/mt65xx.h. 354d4059de4SDaniel Golle 355d4059de4SDaniel Golle bias-pull-down: 356d4059de4SDaniel Golle oneOf: 357d4059de4SDaniel Golle - type: boolean 358d4059de4SDaniel Golle description: normal pull down. 359d4059de4SDaniel Golle - enum: [100, 101, 102, 103] 360d4059de4SDaniel Golle description: > 361d4059de4SDaniel Golle PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in 362d4059de4SDaniel Golle dt-bindings/pinctrl/mt65xx.h. 363d4059de4SDaniel Golle 364d4059de4SDaniel Golle input-enable: true 365d4059de4SDaniel Golle 366d4059de4SDaniel Golle input-disable: true 367d4059de4SDaniel Golle 368d4059de4SDaniel Golle output-enable: true 369d4059de4SDaniel Golle 370d4059de4SDaniel Golle output-low: true 371d4059de4SDaniel Golle 372d4059de4SDaniel Golle output-high: true 373d4059de4SDaniel Golle 374d4059de4SDaniel Golle input-schmitt-enable: true 375d4059de4SDaniel Golle 376d4059de4SDaniel Golle input-schmitt-disable: true 377d4059de4SDaniel Golle 378d4059de4SDaniel Golle drive-strength: 379d4059de4SDaniel Golle enum: [2, 4, 6, 8, 10, 12, 14, 16] 380d4059de4SDaniel Golle 381d4059de4SDaniel Golle mediatek,pull-up-adv: 382d4059de4SDaniel Golle description: | 383d4059de4SDaniel Golle Valid arguments for 'mediatek,pull-up-adv' are '0', '1', '2', '3' 384d4059de4SDaniel Golle Pull up setings for 2 pull resistors, R0 and R1. Valid arguments 385d4059de4SDaniel Golle are described as below: 386d4059de4SDaniel Golle 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 387d4059de4SDaniel Golle 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 388d4059de4SDaniel Golle 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 389d4059de4SDaniel Golle 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled. 390d4059de4SDaniel Golle $ref: /schemas/types.yaml#/definitions/uint32 391d4059de4SDaniel Golle enum: [0, 1, 2, 3] 392d4059de4SDaniel Golle 393d4059de4SDaniel Golle mediatek,pull-down-adv: 394d4059de4SDaniel Golle description: | 395d4059de4SDaniel Golle Valid arguments for 'mediatek,pull-up-adv' are '0', '1', '2', '3' 396d4059de4SDaniel Golle Pull down setings for 2 pull resistors, R0 and R1. Valid arguments 397d4059de4SDaniel Golle are described as below: 398d4059de4SDaniel Golle 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 399d4059de4SDaniel Golle 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 400d4059de4SDaniel Golle 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 401d4059de4SDaniel Golle 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled. 402d4059de4SDaniel Golle $ref: /schemas/types.yaml#/definitions/uint32 403d4059de4SDaniel Golle enum: [0, 1, 2, 3] 404d4059de4SDaniel Golle 405d4059de4SDaniel Golle required: 406d4059de4SDaniel Golle - pins 407d4059de4SDaniel Golle 408d4059de4SDaniel GolleadditionalProperties: false 409d4059de4SDaniel Golle 410d4059de4SDaniel Golleexamples: 411d4059de4SDaniel Golle - | 412d4059de4SDaniel Golle #include <dt-bindings/interrupt-controller/irq.h> 413d4059de4SDaniel Golle #include <dt-bindings/interrupt-controller/arm-gic.h> 414d4059de4SDaniel Golle #include <dt-bindings/pinctrl/mt65xx.h> 415d4059de4SDaniel Golle 416d4059de4SDaniel Golle soc { 417d4059de4SDaniel Golle #address-cells = <2>; 418d4059de4SDaniel Golle #size-cells = <2>; 419d4059de4SDaniel Golle pio: pinctrl@11d00000 { 420d4059de4SDaniel Golle compatible = "mediatek,mt7981-pinctrl"; 421d4059de4SDaniel Golle reg = <0 0x11d00000 0 0x1000>, 422d4059de4SDaniel Golle <0 0x11c00000 0 0x1000>, 423d4059de4SDaniel Golle <0 0x11c10000 0 0x1000>, 424d4059de4SDaniel Golle <0 0x11d20000 0 0x1000>, 425d4059de4SDaniel Golle <0 0x11e00000 0 0x1000>, 426d4059de4SDaniel Golle <0 0x11e20000 0 0x1000>, 427d4059de4SDaniel Golle <0 0x11f00000 0 0x1000>, 428d4059de4SDaniel Golle <0 0x11f10000 0 0x1000>, 429d4059de4SDaniel Golle <0 0x1000b000 0 0x1000>; 430d4059de4SDaniel Golle reg-names = "gpio", "iocfg_rt", "iocfg_rm", 431d4059de4SDaniel Golle "iocfg_rb", "iocfg_lb", "iocfg_bl", 432d4059de4SDaniel Golle "iocfg_tm", "iocfg_tl", "eint"; 433d4059de4SDaniel Golle gpio-controller; 434d4059de4SDaniel Golle #gpio-cells = <2>; 435d4059de4SDaniel Golle gpio-ranges = <&pio 0 0 56>; 436d4059de4SDaniel Golle interrupt-controller; 437d4059de4SDaniel Golle interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 438d4059de4SDaniel Golle interrupt-parent = <&gic>; 439d4059de4SDaniel Golle #interrupt-cells = <2>; 440d4059de4SDaniel Golle 441d4059de4SDaniel Golle mdio_pins: mdio-pins { 442d4059de4SDaniel Golle mux { 443d4059de4SDaniel Golle function = "eth"; 444d4059de4SDaniel Golle groups = "smi_mdc_mdio"; 445d4059de4SDaniel Golle }; 446d4059de4SDaniel Golle }; 447d4059de4SDaniel Golle 448d4059de4SDaniel Golle spi0_flash_pins: spi0-pins { 449d4059de4SDaniel Golle mux { 450d4059de4SDaniel Golle function = "spi"; 451d4059de4SDaniel Golle groups = "spi0", "spi0_wp_hold"; 452d4059de4SDaniel Golle }; 453d4059de4SDaniel Golle 454d4059de4SDaniel Golle conf-pu { 455d4059de4SDaniel Golle pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP"; 456d4059de4SDaniel Golle drive-strength = <MTK_DRIVE_8mA>; 457d4059de4SDaniel Golle bias-pull-up = <MTK_PUPD_SET_R1R0_11>; 458d4059de4SDaniel Golle }; 459d4059de4SDaniel Golle 460d4059de4SDaniel Golle conf-pd { 461d4059de4SDaniel Golle pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO"; 462d4059de4SDaniel Golle drive-strength = <MTK_DRIVE_8mA>; 463d4059de4SDaniel Golle bias-pull-down = <MTK_PUPD_SET_R1R0_11>; 464d4059de4SDaniel Golle }; 465d4059de4SDaniel Golle }; 466d4059de4SDaniel Golle 467d4059de4SDaniel Golle pcie_pins: pcie-pins { 468d4059de4SDaniel Golle mux { 469d4059de4SDaniel Golle function = "pcie"; 470d4059de4SDaniel Golle groups = "pcie_clk", "pcie_wake", "pcie_pereset"; 471d4059de4SDaniel Golle }; 472d4059de4SDaniel Golle }; 473d4059de4SDaniel Golle 474d4059de4SDaniel Golle }; 475d4059de4SDaniel Golle }; 476