1* Marvell Dove SoC pinctrl driver for mpp 2 3Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding 4part and usage. 5 6Required properties: 7- compatible: "marvell,dove-pinctrl" 8- clocks: (optional) phandle of pdma clock 9 10Available mpp pins/groups and functions: 11Note: brackets (x) are not part of the mpp name for marvell,function and given 12only for more detailed description in this document. 13 14name pins functions 15================================================================================ 16mpp0 0 gpio, pmu, uart2(rts), sdio0(cd), lcd0(pwm) 17mpp1 1 gpio, pmu, uart2(cts), sdio0(wp), lcd1(pwm) 18mpp2 2 gpio, pmu, uart2(txd), sdio0(buspwr), sata(prsnt), 19 uart1(rts) 20mpp3 3 gpio, pmu, uart2(rxd), sdio0(ledctrl), sata(act), 21 uart1(cts), lcd-spi(cs1) 22mpp4 4 gpio, pmu, uart3(rts), sdio1(cd), spi1(miso) 23mpp5 5 gpio, pmu, uart3(cts), sdio1(wp), spi1(cs) 24mpp6 6 gpio, pmu, uart3(txd), sdio1(buspwr), spi1(mosi) 25mpp7 7 gpio, pmu, uart3(rxd), sdio1(ledctrl), spi1(sck) 26mpp8 8 gpio, pmu, watchdog(rstout) 27mpp9 9 gpio, pmu, pex1(clkreq) 28mpp10 10 gpio, pmu, ssp(sclk) 29mpp11 11 gpio, pmu, sata(prsnt), sata-1(act), sdio0(ledctrl), 30 sdio1(ledctrl), pex0(clkreq) 31mpp12 12 gpio, pmu, uart2(rts), audio0(extclk), sdio1(cd), sata(act) 32mpp13 13 gpio, pmu, uart2(cts), audio1(extclk), sdio1(wp), 33 ssp(extclk) 34mpp14 14 gpio, pmu, uart2(txd), sdio1(buspwr), ssp(rxd) 35mpp15 15 gpio, pmu, uart2(rxd), sdio1(ledctrl), ssp(sfrm) 36mpp16 16 gpio, uart3(rts), sdio0(cd), ac97(sdi1), lcd-spi(cs1) 37mpp17 17 gpio, uart3(cts), sdio0(wp), ac97(sdi2), twsi(sda), 38 ac97-1(sysclko) 39mpp18 18 gpio, uart3(txd), sdio0(buspwr), ac97(sdi3), lcd0(pwm) 40mpp19 19 gpio, uart3(rxd), sdio0(ledctrl), twsi(sck) 41mpp20 20 gpio, sdio0(cd), sdio1(cd), spi1(miso), lcd-spi(miso), 42 ac97(sysclko) 43mpp21 21 gpio, sdio0(wp), sdio1(wp), spi1(cs), lcd-spi(cs0), 44 uart1(cts), ssp(sfrm) 45mpp22 22 gpio, sdio0(buspwr), sdio1(buspwr), spi1(mosi), 46 lcd-spi(mosi), uart1(cts), ssp(txd) 47mpp23 23 gpio, sdio0(ledctrl), sdio1(ledctrl), spi1(sck), 48 lcd-spi(sck), ssp(sclk) 49mpp_camera 24-39 gpio, camera 50mpp_sdio0 40-45 gpio, sdio0 51mpp_sdio1 46-51 gpio, sdio1 52mpp_audio1 52-57 gpio, i2s1/spdifo, i2s1, spdifo, twsi, ssp/spdifo, ssp, 53 ssp/twsi 54mpp_spi0 58-61 gpio, spi0 55mpp_uart1 62-63 gpio, uart1 56mpp_nand 64-71 gpo, nand 57audio0 - i2s, ac97 58twsi - none, opt1, opt2, opt3 59 60Notes: 61* group "mpp_audio1" allows the following functions and gpio pins: 62 - gpio : gpio on pins 52-57 63 - i2s1/spdifo : audio1 i2s on pins 52-55 and spdifo on 57, no gpios 64 - i2s1 : audio1 i2s on pins 52-55, gpio on pins 56,57 65 - spdifo : spdifo on pin 57, gpio on pins 52-55 66 - twsi : twsi on pins 56,57, gpio on pins 52-55 67 - ssp/spdifo : ssp on pins 52-55, spdifo on pin 57, no gpios 68 - ssp : ssp on pins 52-55, gpio on pins 56,57 69 - ssp/twsi : ssp on pins 52-55, twsi on pins 56,57, no gpios 70* group "audio0" internally muxes i2s0 or ac97 controller to the dedicated 71 audio0 pins. 72* group "twsi" internally muxes twsi controller to the dedicated or option pins. 73