141af189bSJacky Bai# SPDX-License-Identifier: GPL-2.0 241af189bSJacky Bai%YAML 1.2 341af189bSJacky Bai--- 441af189bSJacky Bai$id: http://devicetree.org/schemas/pinctrl/fsl,imx8ulp-pinctrl.yaml# 541af189bSJacky Bai$schema: http://devicetree.org/meta-schemas/core.yaml# 641af189bSJacky Bai 741af189bSJacky Baititle: Freescale IMX8ULP IOMUX Controller 841af189bSJacky Bai 941af189bSJacky Baimaintainers: 1041af189bSJacky Bai - Jacky Bai <ping.bai@nxp.com> 1141af189bSJacky Bai 1241af189bSJacky Baidescription: 1341af189bSJacky Bai Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory 1441af189bSJacky Bai for common binding part and usage. 1541af189bSJacky Bai 1641af189bSJacky Baiproperties: 1741af189bSJacky Bai compatible: 1841af189bSJacky Bai const: fsl,imx8ulp-iomuxc1 1941af189bSJacky Bai 2041af189bSJacky Bai reg: 2141af189bSJacky Bai maxItems: 1 2241af189bSJacky Bai 2341af189bSJacky Bai# Client device subnode's properties 2441af189bSJacky BaipatternProperties: 2541af189bSJacky Bai 'grp$': 2641af189bSJacky Bai type: object 2741af189bSJacky Bai description: 2841af189bSJacky Bai Pinctrl node's client devices use subnodes for desired pin configuration. 2941af189bSJacky Bai Client device subnodes use below standard properties. 3041af189bSJacky Bai 3141af189bSJacky Bai properties: 3241af189bSJacky Bai fsl,pins: 3341af189bSJacky Bai description: 3441af189bSJacky Bai each entry consists of 5 integers and represents the mux and config 3541af189bSJacky Bai setting for one pin. The first 4 integers <mux_config_reg input_reg 3641af189bSJacky Bai mux_mode input_val> are specified using a PIN_FUNC_ID macro, which can 3741af189bSJacky Bai be found in <arch/arm64/boot/dts/freescale/imx8ulp-pinfunc.h>. The last 3841af189bSJacky Bai integer CONFIG is the pad setting value like pull-up on this pin. Please 3941af189bSJacky Bai refer to i.MX8ULP Reference Manual for detailed CONFIG settings. 4041af189bSJacky Bai $ref: /schemas/types.yaml#/definitions/uint32-matrix 4141af189bSJacky Bai items: 4241af189bSJacky Bai items: 4341af189bSJacky Bai - description: | 4441af189bSJacky Bai "mux_config_reg" indicates the offset of mux register. 4541af189bSJacky Bai - description: | 4641af189bSJacky Bai "input_reg" indicates the offset of select input register. 4741af189bSJacky Bai - description: | 4841af189bSJacky Bai "mux_mode" indicates the mux value to be applied. 4941af189bSJacky Bai - description: | 5041af189bSJacky Bai "input_val" indicates the select input value to be applied. 5141af189bSJacky Bai - description: | 5241af189bSJacky Bai "pad_setting" indicates the pad configuration value to be applied. 5341af189bSJacky Bai 5441af189bSJacky Bai required: 5541af189bSJacky Bai - fsl,pins 5641af189bSJacky Bai 5741af189bSJacky Bai additionalProperties: false 5841af189bSJacky Bai 59c09acbc4SRafał MiłeckiallOf: 60*49cd1dd1SRob Herring - $ref: pinctrl.yaml# 61c09acbc4SRafał Miłecki 6241af189bSJacky Bairequired: 6341af189bSJacky Bai - compatible 6441af189bSJacky Bai - reg 6541af189bSJacky Bai 6641af189bSJacky BaiadditionalProperties: false 6741af189bSJacky Bai 6841af189bSJacky Baiexamples: 6941af189bSJacky Bai # Pinmux controller node 7041af189bSJacky Bai - | 7141af189bSJacky Bai iomuxc: pinctrl@298c0000 { 7241af189bSJacky Bai compatible = "fsl,imx8ulp-iomuxc1"; 7341af189bSJacky Bai reg = <0x298c0000 0x10000>; 7441af189bSJacky Bai 7541af189bSJacky Bai pinctrl_lpuart5: lpuart5grp { 7641af189bSJacky Bai fsl,pins = 7741af189bSJacky Bai <0x0138 0x08F0 0x4 0x3 0x3>, 7841af189bSJacky Bai <0x013C 0x08EC 0x4 0x3 0x3>; 7941af189bSJacky Bai }; 8041af189bSJacky Bai }; 8141af189bSJacky Bai 8241af189bSJacky Bai... 83