xref: /linux/Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml (revision 7ae9fb1b7ecbb5d85d07857943f677fd1a559b18)
1aeb871d6SAbel Vesa# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2aeb871d6SAbel Vesa%YAML 1.2
3aeb871d6SAbel Vesa---
4aeb871d6SAbel Vesa$id: http://devicetree.org/schemas/pinctrl/fsl,scu-pinctrl.yaml#
5aeb871d6SAbel Vesa$schema: http://devicetree.org/meta-schemas/core.yaml#
6aeb871d6SAbel Vesa
7*3367934dSKrzysztof Kozlowskititle: i.MX SCU Client Device Node - Pinctrl Based on SCU Message Protocol
8aeb871d6SAbel Vesa
9aeb871d6SAbel Vesamaintainers:
10aeb871d6SAbel Vesa  - Dong Aisheng <aisheng.dong@nxp.com>
11aeb871d6SAbel Vesa
12aeb871d6SAbel Vesadescription: i.MX SCU Client Device Node
13aeb871d6SAbel Vesa  Client nodes are maintained as children of the relevant IMX-SCU device node.
14aeb871d6SAbel Vesa  This binding uses the i.MX common pinctrl binding.
15aeb871d6SAbel Vesa  (Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt)
16aeb871d6SAbel Vesa
17aeb871d6SAbel VesaallOf:
18aeb871d6SAbel Vesa  - $ref: pinctrl.yaml#
19aeb871d6SAbel Vesa
20aeb871d6SAbel Vesaproperties:
21aeb871d6SAbel Vesa  compatible:
22aeb871d6SAbel Vesa    enum:
23aeb871d6SAbel Vesa      - fsl,imx8qm-iomuxc
24aeb871d6SAbel Vesa      - fsl,imx8qxp-iomuxc
25aeb871d6SAbel Vesa      - fsl,imx8dxl-iomuxc
26aeb871d6SAbel Vesa
27aeb871d6SAbel VesapatternProperties:
28aeb871d6SAbel Vesa  'grp$':
29aeb871d6SAbel Vesa    type: object
30aeb871d6SAbel Vesa    description:
31aeb871d6SAbel Vesa      Pinctrl node's client devices use subnodes for desired pin configuration.
32aeb871d6SAbel Vesa      Client device subnodes use below standard properties.
33aeb871d6SAbel Vesa
34aeb871d6SAbel Vesa    properties:
35aeb871d6SAbel Vesa      fsl,pins:
36aeb871d6SAbel Vesa        description:
37aeb871d6SAbel Vesa          each entry consists of 3 integers and represents the pin ID, the mux value
38aeb871d6SAbel Vesa          and pad setting for the pin. The first 2 integers - pin_id and mux_val - are
39aeb871d6SAbel Vesa          specified using a PIN_FUNC_ID macro, which can be found in
40aeb871d6SAbel Vesa          <include/dt-bindings/pinctrl/pads-imx8qxp.h>. The last integer is
41aeb871d6SAbel Vesa          the pad setting value like pull-up on this pin. Please refer to the
42aeb871d6SAbel Vesa          appropriate i.MX8 Reference Manual for detailed pad CONFIG settings.
43aeb871d6SAbel Vesa        $ref: /schemas/types.yaml#/definitions/uint32-matrix
44aeb871d6SAbel Vesa        items:
45aeb871d6SAbel Vesa          items:
46aeb871d6SAbel Vesa            - description: |
47aeb871d6SAbel Vesa                "pin_id" indicates the pin ID
48aeb871d6SAbel Vesa            - description: |
49aeb871d6SAbel Vesa                "mux_val" indicates the mux value to be applied.
50aeb871d6SAbel Vesa            - description: |
51aeb871d6SAbel Vesa                "pad_setting" indicates the pad configuration value to be applied.
52aeb871d6SAbel Vesa
53aeb871d6SAbel Vesa    required:
54aeb871d6SAbel Vesa      - fsl,pins
55aeb871d6SAbel Vesa
56aeb871d6SAbel Vesa    additionalProperties: false
57aeb871d6SAbel Vesa
58aeb871d6SAbel Vesarequired:
59aeb871d6SAbel Vesa  - compatible
60aeb871d6SAbel Vesa
61aeb871d6SAbel VesaadditionalProperties: false
62aeb871d6SAbel Vesa
63aeb871d6SAbel Vesaexamples:
64aeb871d6SAbel Vesa  - |
65aeb871d6SAbel Vesa    pinctrl {
66aeb871d6SAbel Vesa        compatible = "fsl,imx8qxp-iomuxc";
67aeb871d6SAbel Vesa
68aeb871d6SAbel Vesa        pinctrl_lpuart0: lpuart0grp {
69aeb871d6SAbel Vesa            fsl,pins = <
70aeb871d6SAbel Vesa                111 0 0x06000020
71aeb871d6SAbel Vesa                112 0 0x06000020
72aeb871d6SAbel Vesa            >;
73aeb871d6SAbel Vesa        };
74aeb871d6SAbel Vesa    };
75