xref: /linux/Documentation/devicetree/bindings/pinctrl/eswin,eic7700-pinctrl.yaml (revision 186f3edfdd41f2ae87fc40a9ccba52a3bf930994)
1*0a11110bSYulin Lu# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2*0a11110bSYulin Lu%YAML 1.2
3*0a11110bSYulin Lu---
4*0a11110bSYulin Lu$id: http://devicetree.org/schemas/pinctrl/eswin,eic7700-pinctrl.yaml#
5*0a11110bSYulin Lu$schema: http://devicetree.org/meta-schemas/core.yaml#
6*0a11110bSYulin Lu
7*0a11110bSYulin Lutitle: Eswin Eic7700 Pinctrl
8*0a11110bSYulin Lu
9*0a11110bSYulin Lumaintainers:
10*0a11110bSYulin Lu  - Yulin Lu <luyulin@eswincomputing.com>
11*0a11110bSYulin Lu
12*0a11110bSYulin LuallOf:
13*0a11110bSYulin Lu  - $ref: pinctrl.yaml#
14*0a11110bSYulin Lu
15*0a11110bSYulin Ludescription: |
16*0a11110bSYulin Lu  eic7700 pin configuration nodes act as a container for an arbitrary number of
17*0a11110bSYulin Lu  subnodes. Each of these subnodes represents some desired configuration for one or
18*0a11110bSYulin Lu  more pins. This configuration can include the mux function to select on those pin(s),
19*0a11110bSYulin Lu  and various pin configuration parameters, such as input-enable, pull-up, etc.
20*0a11110bSYulin Lu
21*0a11110bSYulin Luproperties:
22*0a11110bSYulin Lu  compatible:
23*0a11110bSYulin Lu    const: eswin,eic7700-pinctrl
24*0a11110bSYulin Lu
25*0a11110bSYulin Lu  reg:
26*0a11110bSYulin Lu    maxItems: 1
27*0a11110bSYulin Lu
28*0a11110bSYulin Lu  vrgmii-supply:
29*0a11110bSYulin Lu    description:
30*0a11110bSYulin Lu      Regulator supply for the RGMII interface IO power domain.
31*0a11110bSYulin Lu      This property should reference a regulator that provides either 1.8V or 3.3V,
32*0a11110bSYulin Lu      depending on the board-level voltage configuration required by the RGMII interface.
33*0a11110bSYulin Lu
34*0a11110bSYulin LupatternProperties:
35*0a11110bSYulin Lu  '-grp$':
36*0a11110bSYulin Lu    type: object
37*0a11110bSYulin Lu    additionalProperties: false
38*0a11110bSYulin Lu
39*0a11110bSYulin Lu    patternProperties:
40*0a11110bSYulin Lu      '-pins$':
41*0a11110bSYulin Lu        type: object
42*0a11110bSYulin Lu
43*0a11110bSYulin Lu        properties:
44*0a11110bSYulin Lu          pins:
45*0a11110bSYulin Lu            description:
46*0a11110bSYulin Lu              For eic7700, specifies the name(s) of one or more pins to be configured by
47*0a11110bSYulin Lu              this node.
48*0a11110bSYulin Lu            items:
49*0a11110bSYulin Lu              enum: [ chip_mode, mode_set0, mode_set1, mode_set2, mode_set3, xin,
50*0a11110bSYulin Lu                      rst_out_n, key_reset_n, gpio0, por_sel, jtag0_tck, jtag0_tms,
51*0a11110bSYulin Lu                      jtag0_tdi, jtag0_tdo, gpio5, spi2_cs0_n, jtag1_tck, jtag1_tms,
52*0a11110bSYulin Lu                      jtag1_tdi, jtag1_tdo, gpio11, spi2_cs1_n, pcie_clkreq_n,
53*0a11110bSYulin Lu                      pcie_wake_n, pcie_perst_n, hdmi_scl, hdmi_sda, hdmi_cec,
54*0a11110bSYulin Lu                      jtag2_trst, rgmii0_clk_125, rgmii0_txen, rgmii0_txclk,
55*0a11110bSYulin Lu                      rgmii0_txd0, rgmii0_txd1, rgmii0_txd2, rgmii0_txd3, i2s0_bclk,
56*0a11110bSYulin Lu                      i2s0_wclk, i2s0_sdi, i2s0_sdo, i2s_mclk, rgmii0_rxclk,
57*0a11110bSYulin Lu                      rgmii0_rxdv, rgmii0_rxd0, rgmii0_rxd1, rgmii0_rxd2, rgmii0_rxd3,
58*0a11110bSYulin Lu                      i2s2_bclk, i2s2_wclk, i2s2_sdi, i2s2_sdo, gpio27, gpio28, gpio29,
59*0a11110bSYulin Lu                      rgmii0_mdc, rgmii0_mdio, rgmii0_intb, rgmii1_clk_125, rgmii1_txen,
60*0a11110bSYulin Lu                      rgmii1_txclk, rgmii1_txd0, rgmii1_txd1, rgmii1_txd2, rgmii1_txd3,
61*0a11110bSYulin Lu                      i2s1_bclk, i2s1_wclk, i2s1_sdi, i2s1_sdo, gpio34, rgmii1_rxclk,
62*0a11110bSYulin Lu                      rgmii1_rxdv, rgmii1_rxd0, rgmii1_rxd1, rgmii1_rxd2, rgmii1_rxd3,
63*0a11110bSYulin Lu                      spi1_cs0_n, spi1_clk, spi1_d0, spi1_d1, spi1_d2, spi1_d3, spi1_cs1_n,
64*0a11110bSYulin Lu                      rgmii1_mdc, rgmii1_mdio, rgmii1_intb, usb0_pwren, usb1_pwren,
65*0a11110bSYulin Lu                      i2c0_scl, i2c0_sda, i2c1_scl, i2c1_sda, i2c2_scl, i2c2_sda,
66*0a11110bSYulin Lu                      i2c3_scl, i2c3_sda, i2c4_scl, i2c4_sda, i2c5_scl, i2c5_sda,
67*0a11110bSYulin Lu                      uart0_tx, uart0_rx, uart1_tx, uart1_rx, uart1_cts, uart1_rts,
68*0a11110bSYulin Lu                      uart2_tx, uart2_rx, jtag2_tck, jtag2_tms, jtag2_tdi, jtag2_tdo,
69*0a11110bSYulin Lu                      fan_pwm, fan_tach, mipi_csi0_xvs, mipi_csi0_xhs, mipi_csi0_mclk,
70*0a11110bSYulin Lu                      mipi_csi1_xvs, mipi_csi1_xhs, mipi_csi1_mclk, mipi_csi2_xvs,
71*0a11110bSYulin Lu                      mipi_csi2_xhs, mipi_csi2_mclk, mipi_csi3_xvs, mipi_csi3_xhs,
72*0a11110bSYulin Lu                      mipi_csi3_mclk, mipi_csi4_xvs, mipi_csi4_xhs, mipi_csi4_mclk,
73*0a11110bSYulin Lu                      mipi_csi5_xvs, mipi_csi5_xhs, mipi_csi5_mclk, spi3_cs_n, spi3_clk,
74*0a11110bSYulin Lu                      spi3_di, spi3_do, gpio92, gpio93, s_mode, gpio95, spi0_cs_n,
75*0a11110bSYulin Lu                      spi0_clk, spi0_d0, spi0_d1, spi0_d2, spi0_d3, i2c10_scl,
76*0a11110bSYulin Lu                      i2c10_sda, i2c11_scl, i2c11_sda, gpio106, boot_sel0, boot_sel1,
77*0a11110bSYulin Lu                      boot_sel2, boot_sel3, gpio111, lpddr_ref_clk ]
78*0a11110bSYulin Lu
79*0a11110bSYulin Lu          function:
80*0a11110bSYulin Lu            description:
81*0a11110bSYulin Lu              Specify the alternative function to be configured for the
82*0a11110bSYulin Lu              given pins.
83*0a11110bSYulin Lu            enum: [ disabled, boot_sel, chip_mode, emmc, fan_tach,
84*0a11110bSYulin Lu                    gpio, hdmi, i2c, i2s, jtag, ddr_ref_clk_sel,
85*0a11110bSYulin Lu                    lpddr_ref_clk, mipi_csi, osc, pcie, pwm,
86*0a11110bSYulin Lu                    rgmii, reset, sata, sdio, spi, s_mode, uart, usb ]
87*0a11110bSYulin Lu
88*0a11110bSYulin Lu          input-schmitt-enable: true
89*0a11110bSYulin Lu
90*0a11110bSYulin Lu          input-schmitt-disable: true
91*0a11110bSYulin Lu
92*0a11110bSYulin Lu          bias-disable: true
93*0a11110bSYulin Lu
94*0a11110bSYulin Lu          bias-pull-down: true
95*0a11110bSYulin Lu
96*0a11110bSYulin Lu          bias-pull-up: true
97*0a11110bSYulin Lu
98*0a11110bSYulin Lu          input-enable: true
99*0a11110bSYulin Lu
100*0a11110bSYulin Lu          input-disable: true
101*0a11110bSYulin Lu
102*0a11110bSYulin Lu          drive-strength-microamp: true
103*0a11110bSYulin Lu
104*0a11110bSYulin Lu        required:
105*0a11110bSYulin Lu          - pins
106*0a11110bSYulin Lu
107*0a11110bSYulin Lu        additionalProperties: false
108*0a11110bSYulin Lu
109*0a11110bSYulin Lu        allOf:
110*0a11110bSYulin Lu          - $ref: pincfg-node.yaml#
111*0a11110bSYulin Lu          - $ref: pinmux-node.yaml#
112*0a11110bSYulin Lu
113*0a11110bSYulin Lu          - if:
114*0a11110bSYulin Lu              properties:
115*0a11110bSYulin Lu                pins:
116*0a11110bSYulin Lu                  anyOf:
117*0a11110bSYulin Lu                    - pattern: '^rgmii'
118*0a11110bSYulin Lu                    - const: lpddr_ref_clk
119*0a11110bSYulin Lu            then:
120*0a11110bSYulin Lu              properties:
121*0a11110bSYulin Lu                drive-strength-microamp:
122*0a11110bSYulin Lu                  enum: [3000, 6000, 9000, 12000, 15000, 18000, 21000, 24000]
123*0a11110bSYulin Lu            else:
124*0a11110bSYulin Lu              properties:
125*0a11110bSYulin Lu                drive-strength-microamp:
126*0a11110bSYulin Lu                  enum: [6000, 9000, 12000, 15000, 18000, 21000, 24000, 27000]
127*0a11110bSYulin Lu
128*0a11110bSYulin Lurequired:
129*0a11110bSYulin Lu  - compatible
130*0a11110bSYulin Lu  - reg
131*0a11110bSYulin Lu
132*0a11110bSYulin LuunevaluatedProperties: false
133*0a11110bSYulin Lu
134*0a11110bSYulin Luexamples:
135*0a11110bSYulin Lu  - |
136*0a11110bSYulin Lu    pinctrl@51600080 {
137*0a11110bSYulin Lu      compatible = "eswin,eic7700-pinctrl";
138*0a11110bSYulin Lu      reg = <0x51600080 0x1fff80>;
139*0a11110bSYulin Lu      vrgmii-supply = <&vcc_1v8>;
140*0a11110bSYulin Lu
141*0a11110bSYulin Lu      dev-active-grp {
142*0a11110bSYulin Lu        /* group node defining 1 standard pin */
143*0a11110bSYulin Lu        gpio10-pins {
144*0a11110bSYulin Lu          pins = "jtag1_tdo";
145*0a11110bSYulin Lu          function = "gpio";
146*0a11110bSYulin Lu          input-enable;
147*0a11110bSYulin Lu          bias-pull-up;
148*0a11110bSYulin Lu        };
149*0a11110bSYulin Lu
150*0a11110bSYulin Lu        /* group node defining 2 I2C pins */
151*0a11110bSYulin Lu        i2c6-pins {
152*0a11110bSYulin Lu          pins = "uart1_cts", "uart1_rts";
153*0a11110bSYulin Lu          function = "i2c";
154*0a11110bSYulin Lu        };
155*0a11110bSYulin Lu      };
156*0a11110bSYulin Lu    };
157