xref: /linux/Documentation/devicetree/bindings/pinctrl/cortina,gemini-pinctrl.txt (revision 552c69b36ebd966186573b9c7a286b390935cce1)
1ff7e4d2aSLinus WalleijCortina Systems Gemini pin controller
2ff7e4d2aSLinus Walleij
3ff7e4d2aSLinus WalleijThis pin controller is found in the Cortina Systems Gemini SoC family,
4ff7e4d2aSLinus Walleijsee further arm/gemini.txt. It is a purely group-based multiplexing pin
5ff7e4d2aSLinus Walleijcontroller.
6ff7e4d2aSLinus Walleij
7ff7e4d2aSLinus WalleijThe pin controller node must be a subnode of the system controller node.
8ff7e4d2aSLinus Walleij
9ff7e4d2aSLinus WalleijRequired properties:
10ff7e4d2aSLinus Walleij- compatible: "cortina,gemini-pinctrl"
11ff7e4d2aSLinus Walleij
1260ad481fSLinus WalleijSubnodes of the pin controller contain pin control multiplexing set-up
1360ad481fSLinus Walleijand pin configuration of individual pins.
1460ad481fSLinus Walleij
1560ad481fSLinus WalleijPlease refer to pinctrl-bindings.txt for generic pin multiplexing nodes
1660ad481fSLinus Walleijand generic pin config nodes.
1760ad481fSLinus Walleij
1860ad481fSLinus WalleijSupported configurations:
1960ad481fSLinus Walleij- skew-delay is supported on the Ethernet pins
20*ad63da85SLinus Walleij- drive-strength with 4, 8, 12 or 16 mA as argument is supported for
21*ad63da85SLinus Walleij  entire groups on the groups "idegrp", "gmii_gmac0_grp", "gmii_gmac1_grp"
22*ad63da85SLinus Walleij  and "pcigrp".
23ff7e4d2aSLinus Walleij
24ff7e4d2aSLinus WalleijExample:
25ff7e4d2aSLinus Walleij
26ff7e4d2aSLinus Walleij
27ff7e4d2aSLinus Walleijsyscon {
28ff7e4d2aSLinus Walleij	compatible = "cortina,gemini-syscon";
29ff7e4d2aSLinus Walleij	...
30ff7e4d2aSLinus Walleij	pinctrl {
31ff7e4d2aSLinus Walleij		compatible = "cortina,gemini-pinctrl";
32ff7e4d2aSLinus Walleij		pinctrl-names = "default";
33ff7e4d2aSLinus Walleij		pinctrl-0 = <&dram_default_pins>, <&system_default_pins>,
34ff7e4d2aSLinus Walleij		    <&vcontrol_default_pins>;
35ff7e4d2aSLinus Walleij
36ff7e4d2aSLinus Walleij		dram_default_pins: pinctrl-dram {
37ff7e4d2aSLinus Walleij			mux {
38ff7e4d2aSLinus Walleij				function = "dram";
39ff7e4d2aSLinus Walleij				groups = "dramgrp";
40ff7e4d2aSLinus Walleij			};
41ff7e4d2aSLinus Walleij		};
42ff7e4d2aSLinus Walleij		rtc_default_pins: pinctrl-rtc {
43ff7e4d2aSLinus Walleij			mux {
44ff7e4d2aSLinus Walleij				function = "rtc";
45ff7e4d2aSLinus Walleij				groups = "rtcgrp";
46ff7e4d2aSLinus Walleij			};
47ff7e4d2aSLinus Walleij		};
48ff7e4d2aSLinus Walleij		power_default_pins: pinctrl-power {
49ff7e4d2aSLinus Walleij			mux {
50ff7e4d2aSLinus Walleij				function = "power";
51ff7e4d2aSLinus Walleij				groups = "powergrp";
52ff7e4d2aSLinus Walleij			};
53ff7e4d2aSLinus Walleij		};
54ff7e4d2aSLinus Walleij		system_default_pins: pinctrl-system {
55ff7e4d2aSLinus Walleij			mux {
56ff7e4d2aSLinus Walleij				function = "system";
57ff7e4d2aSLinus Walleij				groups = "systemgrp";
58ff7e4d2aSLinus Walleij			};
59ff7e4d2aSLinus Walleij		};
60ff7e4d2aSLinus Walleij		(...)
61ff7e4d2aSLinus Walleij		uart_default_pins: pinctrl-uart {
62ff7e4d2aSLinus Walleij			mux {
63ff7e4d2aSLinus Walleij				function = "uart";
64ff7e4d2aSLinus Walleij				groups = "uartrxtxgrp";
65ff7e4d2aSLinus Walleij			};
66ff7e4d2aSLinus Walleij		};
67ff7e4d2aSLinus Walleij	};
68ff7e4d2aSLinus Walleij};
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