1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/canaan,k210-fpioa.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Canaan Kendryte K210 FPIOA Device Tree Bindings 8 9maintainers: 10 - Damien Le Moal <damien.lemoal@wdc.com> 11 12description: 13 The Canaan Kendryte K210 SoC Fully Programmable IO Array (FPIOA) 14 controller allows assiging any of 256 possible functions to any of 15 48 IO pins of the SoC. Pin function configuration is performed on 16 a per-pin basis. 17 18properties: 19 compatible: 20 const: canaan,k210-fpioa 21 22 reg: 23 maxItems: 1 24 description: 25 Address and length of the register set for the FPIOA controller. 26 27 clocks: 28 items: 29 - description: Controller reference clock source 30 - description: APB interface clock source 31 32 clock-names: 33 items: 34 - const: ref 35 - const: pclk 36 37 resets: 38 maxItems: 1 39 40 canaan,k210-sysctl-power: 41 $ref: /schemas/types.yaml#/definitions/phandle-array 42 items: 43 - items: 44 - description: phandle of the K210 system controller node 45 - description: offset of its power domain control register 46 description: | 47 phandle of the K210 system controller node and offset of its 48 power domain control register. 49 50patternProperties: 51 '-pinmux$': 52 type: object 53 $ref: /schemas/pinctrl/pinmux-node.yaml 54 description: 55 FPIOA client devices use sub-nodes to define the desired pin 56 configuration. Client device sub-nodes use the pinux property 57 below. 58 59 properties: 60 pinmux: 61 description: 62 List of IO pins alternate functions. The values for each IO 63 pin is a combination of an IO pin number (0 to 47) with the 64 desired function for the IO pin. Functions are defined as 65 macros in include/dt-bindings/pinctrl/k210-fpioa.h. 66 The K210_FPIOA(IO pin, function) macro is provided to 67 facilitate the combination of IO pin numbers and functions. 68 69 required: 70 - pinmux 71 72 additionalProperties: false 73 74 '-pins$': 75 type: object 76 $ref: /schemas/pinctrl/pincfg-node.yaml 77 description: 78 FPIOA client devices use sub-nodes to define the desired 79 configuration of pins. Client device sub-nodes use the 80 properties below. 81 82 properties: 83 pins: 84 description: 85 List of IO pins affected by the properties specified in this 86 subnode. IO pins are identified using the pin names "IO_xx". 87 Pin configuration nodes can also define the power domain to 88 be used for the SoC pin groups A0 (IO pins 0-5), 89 A1 (IO pins 6-11), A2 (IO pins 12-17), B0 (IO pins 18-23), 90 B1 (IO pins 24-29), B2 (IO pins 30-35), B3 (IO pins 30-35), 91 C0 (IO pins 36-41) and C1 (IO pins 42-47) using the 92 power-source property. 93 items: 94 anyOf: 95 - pattern: "^(IO_([0-9]*))|(A[0-2])|(B[3-5])|(C[6-7])$" 96 - enum: [ IO_0, IO_1, IO_2, IO_3, IO_4, IO_5, IO_6, IO_7, 97 IO_8, IO_9, IO_10, IO_11, IO_12, IO_13, IO_14, 98 IO_15, IO_16, IO_17, IO_18, IO_19, IO_20, IO_21, 99 IO_22, IO_23, IO_24, IO_25, IO_26, IO_27, IO_28, 100 IO_29, IO_30, IO_31, IO_32, IO_33, IO_34, IO_35, 101 IO_36, IO_37, IO_38, IO_39, IO_40, IO_41, IO_42, 102 IO_43, IO_44, IO_45, IO_46, IO_47, 103 A0, A1, A2, B3, B4, B5, C6, C7 ] 104 bias-disable: true 105 106 bias-pull-down: true 107 108 bias-pull-up: true 109 110 drive-strength: true 111 112 drive-strength-microamp: true 113 114 input-enable: true 115 116 input-disable: true 117 118 input-schmitt-enable: true 119 120 input-schmitt-disable: true 121 122 input-polarity-invert: 123 description: 124 Enable or disable pin input polarity inversion. 125 126 output-enable: true 127 128 output-disable: true 129 130 output-high: true 131 132 output-low: true 133 134 output-polarity-invert: 135 description: 136 Enable or disable pin output polarity inversion. 137 138 slew-rate: true 139 140 power-source: true 141 142 additionalProperties: false 143 144allOf: 145 - $ref: "pinctrl.yaml#" 146 147required: 148 - compatible 149 - reg 150 - clocks 151 - canaan,k210-sysctl-power 152 153additionalProperties: false 154 155examples: 156 - | 157 #include <dt-bindings/pinctrl/k210-fpioa.h> 158 #include <dt-bindings/clock/k210-clk.h> 159 #include <dt-bindings/reset/k210-rst.h> 160 161 fpioa: pinmux@502b0000 { 162 compatible = "canaan,k210-fpioa"; 163 reg = <0x502b0000 0x100>; 164 clocks = <&sysclk K210_CLK_FPIOA>, 165 <&sysclk K210_CLK_APB0>; 166 clock-names = "ref", "pclk"; 167 resets = <&sysrst K210_RST_FPIOA>; 168 canaan,k210-sysctl-power = <&sysctl 108>; 169 pinctrl-0 = <&jtag_pinctrl>; 170 pinctrl-names = "default"; 171 172 jtag_pinctrl: jtag-pinmux { 173 pinmux = <K210_FPIOA(0, K210_PCF_JTAG_TCLK)>, 174 <K210_FPIOA(1, K210_PCF_JTAG_TDI)>, 175 <K210_FPIOA(2, K210_PCF_JTAG_TMS)>, 176 <K210_FPIOA(3, K210_PCF_JTAG_TDO)>; 177 }; 178 }; 179