1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/brcm,bcm63268-pinctrl.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Broadcom BCM63268 pin controller 8 9maintainers: 10 - Álvaro Fernández Rojas <noltari@gmail.com> 11 - Jonas Gorski <jonas.gorski@gmail.com> 12 13description: 14 Bindings for Broadcom's BCM63268 memory-mapped pin controller. 15 16properties: 17 compatible: 18 const: brcm,bcm63268-pinctrl 19 20 reg: 21 maxItems: 3 22 23patternProperties: 24 '-pins$': 25 type: object 26 $ref: pinmux-node.yaml# 27 unevaluatedProperties: false 28 29 properties: 30 function: 31 enum: [ serial_led_clk, serial_led_data, hsspi_cs4, hsspi_cs5, 32 hsspi_cs6, hsspi_cs7, adsl_spi_miso, adsl_spi_mosi, 33 vreq_clk, pcie_clkreq_b, robosw_led_clk, robosw_led_data, 34 nand, gpio35_alt, dectpd, vdsl_phy_override_0, 35 vdsl_phy_override_1, vdsl_phy_override_2, 36 vdsl_phy_override_3, dsl_gpio8, dsl_gpio9 ] 37 38 pins: 39 enum: [ gpio0, gpio1, gpio16, gpio17, gpio8, gpio9, gpio18, gpio19, 40 gpio22, gpio23, gpio30, gpio31, nand_grp, gpio35, 41 dectpd_grp, vdsl_phy_override_0_grp, 42 vdsl_phy_override_1_grp, vdsl_phy_override_2_grp, 43 vdsl_phy_override_3_grp, dsl_gpio8, dsl_gpio9 ] 44 45 patternProperties: 46 '-pins$': 47 $ref: '#/patternProperties/-pins$' 48 49allOf: 50 - $ref: pinctrl.yaml# 51 52required: 53 - compatible 54 - reg 55 56additionalProperties: false 57 58examples: 59 - | 60 pinctrl@10 { 61 compatible = "brcm,bcm63268-pinctrl"; 62 reg = <0x10 0x4>, <0x18 0x8>, <0x38 0x4>; 63 64 pinctrl_serial_led: serial_led-pins { 65 pinctrl_serial_led_clk: serial_led_clk-pins { 66 function = "serial_led_clk"; 67 pins = "gpio0"; 68 }; 69 70 pinctrl_serial_led_data: serial_led_data-pins { 71 function = "serial_led_data"; 72 pins = "gpio1"; 73 }; 74 }; 75 76 pinctrl_hsspi_cs4: hsspi_cs4-pins { 77 function = "hsspi_cs4"; 78 pins = "gpio16"; 79 }; 80 81 pinctrl_hsspi_cs5: hsspi_cs5-pins { 82 function = "hsspi_cs5"; 83 pins = "gpio17"; 84 }; 85 86 pinctrl_hsspi_cs6: hsspi_cs6-pins { 87 function = "hsspi_cs6"; 88 pins = "gpio8"; 89 }; 90 91 pinctrl_hsspi_cs7: hsspi_cs7-pins { 92 function = "hsspi_cs7"; 93 pins = "gpio9"; 94 }; 95 96 pinctrl_adsl_spi: adsl_spi-pins { 97 pinctrl_adsl_spi_miso: adsl_spi_miso-pins { 98 function = "adsl_spi_miso"; 99 pins = "gpio18"; 100 }; 101 102 pinctrl_adsl_spi_mosi: adsl_spi_mosi-pins { 103 function = "adsl_spi_mosi"; 104 pins = "gpio19"; 105 }; 106 }; 107 108 pinctrl_vreq_clk: vreq_clk-pins { 109 function = "vreq_clk"; 110 pins = "gpio22"; 111 }; 112 113 pinctrl_pcie_clkreq_b: pcie_clkreq_b-pins { 114 function = "pcie_clkreq_b"; 115 pins = "gpio23"; 116 }; 117 118 pinctrl_robosw_led_clk: robosw_led_clk-pins { 119 function = "robosw_led_clk"; 120 pins = "gpio30"; 121 }; 122 123 pinctrl_robosw_led_data: robosw_led_data-pins { 124 function = "robosw_led_data"; 125 pins = "gpio31"; 126 }; 127 128 pinctrl_nand: nand-pins { 129 function = "nand"; 130 pins = "nand_grp"; 131 }; 132 133 pinctrl_gpio35_alt: gpio35_alt-pins { 134 function = "gpio35_alt"; 135 pins = "gpio35"; 136 }; 137 138 pinctrl_dectpd: dectpd-pins { 139 function = "dectpd"; 140 pins = "dectpd_grp"; 141 }; 142 143 pinctrl_vdsl_phy_override_0: vdsl_phy_override_0-pins { 144 function = "vdsl_phy_override_0"; 145 pins = "vdsl_phy_override_0_grp"; 146 }; 147 148 pinctrl_vdsl_phy_override_1: vdsl_phy_override_1-pins { 149 function = "vdsl_phy_override_1"; 150 pins = "vdsl_phy_override_1_grp"; 151 }; 152 153 pinctrl_vdsl_phy_override_2: vdsl_phy_override_2-pins { 154 function = "vdsl_phy_override_2"; 155 pins = "vdsl_phy_override_2_grp"; 156 }; 157 158 pinctrl_vdsl_phy_override_3: vdsl_phy_override_3-pins { 159 function = "vdsl_phy_override_3"; 160 pins = "vdsl_phy_override_3_grp"; 161 }; 162 163 pinctrl_dsl_gpio8: dsl_gpio8-pins { 164 function = "dsl_gpio8"; 165 pins = "dsl_gpio8"; 166 }; 167 168 pinctrl_dsl_gpio9: dsl_gpio9-pins { 169 function = "dsl_gpio9"; 170 pins = "dsl_gpio9"; 171 }; 172 }; 173