1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/allwinner,sun4i-a10-pinctrl.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Allwinner A10 Pin Controller Device Tree Bindings 8 9maintainers: 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 12 13properties: 14 "#gpio-cells": 15 const: 3 16 description: 17 GPIO consumers must use three arguments, first the number of the 18 bank, then the pin number inside that bank, and finally the GPIO 19 flags. 20 21 "#interrupt-cells": 22 const: 3 23 description: 24 Interrupts consumers must use three arguments, first the number 25 of the bank, then the pin number inside that bank, and finally 26 the interrupts flags. 27 28 compatible: 29 enum: 30 - allwinner,sun4i-a10-pinctrl 31 - allwinner,sun5i-a10s-pinctrl 32 - allwinner,sun5i-a13-pinctrl 33 - allwinner,sun6i-a31-pinctrl 34 - allwinner,sun6i-a31-r-pinctrl 35 - allwinner,sun6i-a31s-pinctrl 36 - allwinner,sun7i-a20-pinctrl 37 - allwinner,sun8i-a23-pinctrl 38 - allwinner,sun8i-a23-r-pinctrl 39 - allwinner,sun8i-a33-pinctrl 40 - allwinner,sun8i-a83t-pinctrl 41 - allwinner,sun8i-a83t-r-pinctrl 42 - allwinner,sun8i-h3-pinctrl 43 - allwinner,sun8i-h3-r-pinctrl 44 - allwinner,sun8i-r40-pinctrl 45 - allwinner,sun8i-v3-pinctrl 46 - allwinner,sun8i-v3s-pinctrl 47 - allwinner,sun9i-a80-pinctrl 48 - allwinner,sun9i-a80-r-pinctrl 49 - allwinner,sun50i-a64-pinctrl 50 - allwinner,sun50i-a64-r-pinctrl 51 - allwinner,sun50i-h5-pinctrl 52 - allwinner,sun50i-h6-pinctrl 53 - allwinner,sun50i-h6-r-pinctrl 54 - allwinner,suniv-f1c100s-pinctrl 55 - nextthing,gr8-pinctrl 56 57 reg: 58 maxItems: 1 59 60 interrupts: 61 minItems: 1 62 maxItems: 5 63 description: 64 One interrupt per external interrupt bank supported on the 65 controller, sorted by bank number ascending order. 66 67 clocks: 68 items: 69 - description: Bus Clock 70 - description: High Frequency Oscillator 71 - description: Low Frequency Oscillator 72 73 clock-names: 74 items: 75 - const: apb 76 - const: hosc 77 - const: losc 78 79 resets: 80 maxItems: 1 81 82 gpio-controller: true 83 interrupt-controller: true 84 gpio-line-names: true 85 86 input-debounce: 87 allOf: 88 - $ref: /schemas/types.yaml#/definitions/uint32-array 89 - minItems: 1 90 maxItems: 5 91 description: 92 Debouncing periods in microseconds, one period per interrupt 93 bank found in the controller 94 95patternProperties: 96 # It's pretty scary, but the basic idea is that: 97 # - One node name can start with either s- or r- for PRCM nodes, 98 # - Then, the name itself can be any repetition of <string>- (to 99 # accomodate with nodes like uart4-rts-cts-pins), where each 100 # string can be either starting with 'p' but in a string longer 101 # than 3, or something that doesn't start with 'p', 102 # - Then, the bank name is optional and will be between pa and pg, 103 # pl or pm. Some pins groups that have several options will have 104 # the pin numbers then, 105 # - Finally, the name will end with either -pin or pins. 106 107 "^([rs]-)?(([a-z0-9]{3,}|[a-oq-z][a-z0-9]*?)?-)+?(p[a-ilm][0-9]*?-)??pins?$": 108 type: object 109 110 properties: 111 pins: true 112 function: true 113 bias-disable: true 114 bias-pull-up: true 115 bias-pull-down: true 116 117 drive-strength: 118 allOf: 119 - $ref: /schemas/types.yaml#/definitions/uint32 120 - enum: [ 10, 20, 30, 40 ] 121 122 required: 123 - pins 124 - function 125 126 additionalProperties: false 127 128 "^vcc-p[a-hlm]-supply$": 129 description: 130 Power supplies for pin banks. 131 132required: 133 - "#gpio-cells" 134 - "#interrupt-cells" 135 - compatible 136 - reg 137 - interrupts 138 - clocks 139 - clock-names 140 - gpio-controller 141 - interrupt-controller 142 143allOf: 144 # FIXME: We should have the pin bank supplies here, but not a lot of 145 # boards are defining it at the moment so it would generate a lot of 146 # warnings. 147 148 - if: 149 properties: 150 compatible: 151 enum: 152 - allwinner,sun9i-a80-pinctrl 153 154 then: 155 properties: 156 interrupts: 157 minItems: 5 158 maxItems: 5 159 160 else: 161 if: 162 properties: 163 compatible: 164 enum: 165 - allwinner,sun6i-a31-pinctrl 166 - allwinner,sun6i-a31s-pinctrl 167 - allwinner,sun50i-h6-pinctrl 168 169 then: 170 properties: 171 interrupts: 172 minItems: 4 173 maxItems: 4 174 175 else: 176 if: 177 properties: 178 compatible: 179 enum: 180 - allwinner,sun8i-a23-pinctrl 181 - allwinner,sun8i-a83t-pinctrl 182 - allwinner,sun50i-a64-pinctrl 183 - allwinner,sun50i-h5-pinctrl 184 - allwinner,suniv-f1c100s-pinctrl 185 186 then: 187 properties: 188 interrupts: 189 minItems: 3 190 maxItems: 3 191 192 else: 193 if: 194 properties: 195 compatible: 196 enum: 197 - allwinner,sun6i-a31-r-pinctrl 198 - allwinner,sun8i-a33-pinctrl 199 - allwinner,sun8i-h3-pinctrl 200 - allwinner,sun8i-v3-pinctrl 201 - allwinner,sun8i-v3s-pinctrl 202 - allwinner,sun9i-a80-r-pinctrl 203 - allwinner,sun50i-h6-r-pinctrl 204 205 then: 206 properties: 207 interrupts: 208 minItems: 2 209 maxItems: 2 210 211 else: 212 properties: 213 interrupts: 214 minItems: 1 215 maxItems: 1 216 217additionalProperties: false 218 219examples: 220 - | 221 #include <dt-bindings/clock/sun5i-ccu.h> 222 223 pio: pinctrl@1c20800 { 224 compatible = "allwinner,sun5i-a13-pinctrl"; 225 reg = <0x01c20800 0x400>; 226 interrupts = <28>; 227 clocks = <&ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>; 228 clock-names = "apb", "hosc", "losc"; 229 gpio-controller; 230 interrupt-controller; 231 #interrupt-cells = <3>; 232 #gpio-cells = <3>; 233 234 uart1_pe_pins: uart1-pe-pins { 235 pins = "PE10", "PE11"; 236 function = "uart1"; 237 }; 238 239 uart1_pg_pins: uart1-pg-pins { 240 pins = "PG3", "PG4"; 241 function = "uart1"; 242 }; 243 }; 244