1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/allwinner,sun4i-a10-pinctrl.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Allwinner A10 Pin Controller Device Tree Bindings 8 9maintainers: 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 12 13properties: 14 "#gpio-cells": 15 const: 3 16 description: 17 GPIO consumers must use three arguments, first the number of the 18 bank, then the pin number inside that bank, and finally the GPIO 19 flags. 20 21 "#interrupt-cells": 22 const: 3 23 description: 24 Interrupts consumers must use three arguments, first the number 25 of the bank, then the pin number inside that bank, and finally 26 the interrupts flags. 27 28 compatible: 29 enum: 30 - allwinner,sun4i-a10-pinctrl 31 - allwinner,sun5i-a10s-pinctrl 32 - allwinner,sun5i-a13-pinctrl 33 - allwinner,sun6i-a31-pinctrl 34 - allwinner,sun6i-a31-r-pinctrl 35 - allwinner,sun6i-a31s-pinctrl 36 - allwinner,sun7i-a20-pinctrl 37 - allwinner,sun8i-a23-pinctrl 38 - allwinner,sun8i-a23-r-pinctrl 39 - allwinner,sun8i-a33-pinctrl 40 - allwinner,sun8i-a83t-pinctrl 41 - allwinner,sun8i-a83t-r-pinctrl 42 - allwinner,sun8i-h3-pinctrl 43 - allwinner,sun8i-h3-r-pinctrl 44 - allwinner,sun8i-r40-pinctrl 45 - allwinner,sun8i-v3-pinctrl 46 - allwinner,sun8i-v3s-pinctrl 47 - allwinner,sun9i-a80-pinctrl 48 - allwinner,sun9i-a80-r-pinctrl 49 - allwinner,sun50i-a64-pinctrl 50 - allwinner,sun50i-a64-r-pinctrl 51 - allwinner,sun50i-a100-pinctrl 52 - allwinner,sun50i-a100-r-pinctrl 53 - allwinner,sun50i-h5-pinctrl 54 - allwinner,sun50i-h6-pinctrl 55 - allwinner,sun50i-h6-r-pinctrl 56 - allwinner,sun50i-h616-pinctrl 57 - allwinner,sun50i-h616-r-pinctrl 58 - allwinner,suniv-f1c100s-pinctrl 59 - nextthing,gr8-pinctrl 60 61 reg: 62 maxItems: 1 63 64 interrupts: 65 minItems: 1 66 maxItems: 8 67 description: 68 One interrupt per external interrupt bank supported on the 69 controller, sorted by bank number ascending order. 70 71 clocks: 72 items: 73 - description: Bus Clock 74 - description: High Frequency Oscillator 75 - description: Low Frequency Oscillator 76 77 clock-names: 78 items: 79 - const: apb 80 - const: hosc 81 - const: losc 82 83 resets: 84 maxItems: 1 85 86 gpio-controller: true 87 interrupt-controller: true 88 gpio-line-names: true 89 90 input-debounce: 91 description: 92 Debouncing periods in microseconds, one period per interrupt 93 bank found in the controller 94 $ref: /schemas/types.yaml#/definitions/uint32-array 95 minItems: 1 96 maxItems: 8 97 98patternProperties: 99 # It's pretty scary, but the basic idea is that: 100 # - One node name can start with either s- or r- for PRCM nodes, 101 # - Then, the name itself can be any repetition of <string>- (to 102 # accomodate with nodes like uart4-rts-cts-pins), where each 103 # string can be either starting with 'p' but in a string longer 104 # than 3, or something that doesn't start with 'p', 105 # - Then, the bank name is optional and will be between pa and pg, 106 # pl or pm. Some pins groups that have several options will have 107 # the pin numbers then, 108 # - Finally, the name will end with either -pin or pins. 109 110 "^([rs]-)?(([a-z0-9]{3,}|[a-oq-z][a-z0-9]*?)?-)+?(p[a-ilm][0-9]*?-)??pins?$": 111 type: object 112 113 properties: 114 pins: true 115 function: true 116 bias-disable: true 117 bias-pull-up: true 118 bias-pull-down: true 119 120 drive-strength: 121 $ref: /schemas/types.yaml#/definitions/uint32 122 enum: [10, 20, 30, 40] 123 124 required: 125 - pins 126 - function 127 128 additionalProperties: false 129 130 "^vcc-p[a-hlm]-supply$": 131 description: 132 Power supplies for pin banks. 133 134required: 135 - "#gpio-cells" 136 - "#interrupt-cells" 137 - compatible 138 - reg 139 - interrupts 140 - clocks 141 - clock-names 142 - gpio-controller 143 - interrupt-controller 144 145allOf: 146 # FIXME: We should have the pin bank supplies here, but not a lot of 147 # boards are defining it at the moment so it would generate a lot of 148 # warnings. 149 150 - if: 151 properties: 152 compatible: 153 enum: 154 - allwinner,sun50i-h616-pinctrl 155 156 then: 157 properties: 158 interrupts: 159 minItems: 8 160 161 - if: 162 properties: 163 compatible: 164 enum: 165 - allwinner,sun50i-a100-pinctrl 166 167 then: 168 properties: 169 interrupts: 170 minItems: 7 171 maxItems: 7 172 173 - if: 174 properties: 175 compatible: 176 enum: 177 - allwinner,sun9i-a80-pinctrl 178 179 then: 180 properties: 181 interrupts: 182 minItems: 5 183 maxItems: 5 184 185 - if: 186 properties: 187 compatible: 188 enum: 189 - allwinner,sun6i-a31-pinctrl 190 - allwinner,sun6i-a31s-pinctrl 191 - allwinner,sun50i-h6-pinctrl 192 193 then: 194 properties: 195 interrupts: 196 minItems: 4 197 maxItems: 4 198 199 - if: 200 properties: 201 compatible: 202 enum: 203 - allwinner,sun8i-a23-pinctrl 204 - allwinner,sun8i-a83t-pinctrl 205 - allwinner,sun50i-a64-pinctrl 206 - allwinner,sun50i-h5-pinctrl 207 - allwinner,suniv-f1c100s-pinctrl 208 209 then: 210 properties: 211 interrupts: 212 minItems: 3 213 maxItems: 3 214 215 - if: 216 properties: 217 compatible: 218 enum: 219 - allwinner,sun6i-a31-r-pinctrl 220 - allwinner,sun8i-a33-pinctrl 221 - allwinner,sun8i-h3-pinctrl 222 - allwinner,sun8i-v3-pinctrl 223 - allwinner,sun8i-v3s-pinctrl 224 - allwinner,sun9i-a80-r-pinctrl 225 - allwinner,sun50i-h6-r-pinctrl 226 227 then: 228 properties: 229 interrupts: 230 minItems: 2 231 maxItems: 2 232 233 - if: 234 properties: 235 compatible: 236 enum: 237 - allwinner,sun4i-a10-pinctrl 238 - allwinner,sun5i-a10s-pinctrl 239 - allwinner,sun5i-a13-pinctrl 240 - allwinner,sun7i-a20-pinctrl 241 - allwinner,sun8i-a23-r-pinctrl 242 - allwinner,sun8i-a83t-r-pinctrl 243 - allwinner,sun8i-h3-r-pinctrl 244 - allwinner,sun8i-r40-pinctrl 245 - allwinner,sun50i-a64-r-pinctrl 246 - allwinner,sun50i-a100-r-pinctrl 247 - nextthing,gr8-pinctrl 248 249 then: 250 properties: 251 interrupts: 252 minItems: 1 253 maxItems: 1 254 255additionalProperties: false 256 257examples: 258 - | 259 #include <dt-bindings/clock/sun5i-ccu.h> 260 261 pio: pinctrl@1c20800 { 262 compatible = "allwinner,sun5i-a13-pinctrl"; 263 reg = <0x01c20800 0x400>; 264 interrupts = <28>; 265 clocks = <&ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>; 266 clock-names = "apb", "hosc", "losc"; 267 gpio-controller; 268 interrupt-controller; 269 #interrupt-cells = <3>; 270 #gpio-cells = <3>; 271 272 uart1_pe_pins: uart1-pe-pins { 273 pins = "PE10", "PE11"; 274 function = "uart1"; 275 }; 276 277 uart1_pg_pins: uart1-pg-pins { 278 pins = "PG3", "PG4"; 279 function = "uart1"; 280 }; 281 }; 282