xref: /linux/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml (revision 4f6b838c378a52ea3ae0b15f12ca8a20849072fa) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/allwinner,sun4i-a10-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner A10 Pin Controller Device Tree Bindings
8
9maintainers:
10  - Chen-Yu Tsai <wens@csie.org>
11  - Maxime Ripard <mripard@kernel.org>
12
13properties:
14  "#gpio-cells":
15    const: 3
16    description:
17      GPIO consumers must use three arguments, first the number of the
18      bank, then the pin number inside that bank, and finally the GPIO
19      flags.
20
21  "#interrupt-cells":
22    const: 3
23    description:
24      Interrupts consumers must use three arguments, first the number
25      of the bank, then the pin number inside that bank, and finally
26      the interrupts flags.
27
28  compatible:
29    enum:
30      - allwinner,sun4i-a10-pinctrl
31      - allwinner,sun5i-a10s-pinctrl
32      - allwinner,sun5i-a13-pinctrl
33      - allwinner,sun6i-a31-pinctrl
34      - allwinner,sun6i-a31-r-pinctrl
35      - allwinner,sun6i-a31s-pinctrl
36      - allwinner,sun7i-a20-pinctrl
37      - allwinner,sun8i-a23-pinctrl
38      - allwinner,sun8i-a23-r-pinctrl
39      - allwinner,sun8i-a33-pinctrl
40      - allwinner,sun8i-a83t-pinctrl
41      - allwinner,sun8i-a83t-r-pinctrl
42      - allwinner,sun8i-h3-pinctrl
43      - allwinner,sun8i-h3-r-pinctrl
44      - allwinner,sun8i-r40-pinctrl
45      - allwinner,sun8i-v3-pinctrl
46      - allwinner,sun8i-v3s-pinctrl
47      - allwinner,sun9i-a80-pinctrl
48      - allwinner,sun9i-a80-r-pinctrl
49      - allwinner,sun50i-a64-pinctrl
50      - allwinner,sun50i-a64-r-pinctrl
51      - allwinner,sun50i-a100-pinctrl
52      - allwinner,sun50i-a100-r-pinctrl
53      - allwinner,sun50i-h5-pinctrl
54      - allwinner,sun50i-h6-pinctrl
55      - allwinner,sun50i-h6-r-pinctrl
56      - allwinner,suniv-f1c100s-pinctrl
57      - nextthing,gr8-pinctrl
58
59  reg:
60    maxItems: 1
61
62  interrupts:
63    minItems: 1
64    maxItems: 7
65    description:
66      One interrupt per external interrupt bank supported on the
67      controller, sorted by bank number ascending order.
68
69  clocks:
70    items:
71      - description: Bus Clock
72      - description: High Frequency Oscillator
73      - description: Low Frequency Oscillator
74
75  clock-names:
76    items:
77      - const: apb
78      - const: hosc
79      - const: losc
80
81  resets:
82    maxItems: 1
83
84  gpio-controller: true
85  interrupt-controller: true
86  gpio-line-names: true
87
88  input-debounce:
89    description:
90      Debouncing periods in microseconds, one period per interrupt
91      bank found in the controller
92    $ref: /schemas/types.yaml#/definitions/uint32-array
93    minItems: 1
94    maxItems: 5
95
96patternProperties:
97  # It's pretty scary, but the basic idea is that:
98  #   - One node name can start with either s- or r- for PRCM nodes,
99  #   - Then, the name itself can be any repetition of <string>- (to
100  #     accomodate with nodes like uart4-rts-cts-pins), where each
101  #     string can be either starting with 'p' but in a string longer
102  #     than 3, or something that doesn't start with 'p',
103  #   - Then, the bank name is optional and will be between pa and pg,
104  #     pl or pm. Some pins groups that have several options will have
105  #     the pin numbers then,
106  #   - Finally, the name will end with either -pin or pins.
107
108  "^([rs]-)?(([a-z0-9]{3,}|[a-oq-z][a-z0-9]*?)?-)+?(p[a-ilm][0-9]*?-)??pins?$":
109    type: object
110
111    properties:
112      pins: true
113      function: true
114      bias-disable: true
115      bias-pull-up: true
116      bias-pull-down: true
117
118      drive-strength:
119        $ref: /schemas/types.yaml#/definitions/uint32
120        enum: [10, 20, 30, 40]
121
122    required:
123      - pins
124      - function
125
126    additionalProperties: false
127
128  "^vcc-p[a-hlm]-supply$":
129    description:
130      Power supplies for pin banks.
131
132required:
133  - "#gpio-cells"
134  - "#interrupt-cells"
135  - compatible
136  - reg
137  - interrupts
138  - clocks
139  - clock-names
140  - gpio-controller
141  - interrupt-controller
142
143allOf:
144  # FIXME: We should have the pin bank supplies here, but not a lot of
145  # boards are defining it at the moment so it would generate a lot of
146  # warnings.
147
148  - if:
149      properties:
150        compatible:
151          enum:
152            - allwinner,sun50i-a100-pinctrl
153
154    then:
155      properties:
156        interrupts:
157          minItems: 7
158          maxItems: 7
159
160  - if:
161      properties:
162        compatible:
163          enum:
164            - allwinner,sun9i-a80-pinctrl
165
166    then:
167      properties:
168        interrupts:
169          minItems: 5
170          maxItems: 5
171
172  - if:
173      properties:
174        compatible:
175          enum:
176            - allwinner,sun6i-a31-pinctrl
177            - allwinner,sun6i-a31s-pinctrl
178            - allwinner,sun50i-h6-pinctrl
179
180    then:
181      properties:
182        interrupts:
183          minItems: 4
184          maxItems: 4
185
186  - if:
187      properties:
188        compatible:
189          enum:
190            - allwinner,sun8i-a23-pinctrl
191            - allwinner,sun8i-a83t-pinctrl
192            - allwinner,sun50i-a64-pinctrl
193            - allwinner,sun50i-h5-pinctrl
194            - allwinner,suniv-f1c100s-pinctrl
195
196    then:
197      properties:
198        interrupts:
199          minItems: 3
200          maxItems: 3
201
202  - if:
203      properties:
204        compatible:
205          enum:
206            - allwinner,sun6i-a31-r-pinctrl
207            - allwinner,sun8i-a33-pinctrl
208            - allwinner,sun8i-h3-pinctrl
209            - allwinner,sun8i-v3-pinctrl
210            - allwinner,sun8i-v3s-pinctrl
211            - allwinner,sun9i-a80-r-pinctrl
212            - allwinner,sun50i-h6-r-pinctrl
213
214    then:
215      properties:
216        interrupts:
217          minItems: 2
218          maxItems: 2
219
220  - if:
221      properties:
222        compatible:
223          enum:
224            - allwinner,sun4i-a10-pinctrl
225            - allwinner,sun5i-a10s-pinctrl
226            - allwinner,sun5i-a13-pinctrl
227            - allwinner,sun7i-a20-pinctrl
228            - allwinner,sun8i-a23-r-pinctrl
229            - allwinner,sun8i-a83t-r-pinctrl
230            - allwinner,sun8i-h3-r-pinctrl
231            - allwinner,sun8i-r40-pinctrl
232            - allwinner,sun50i-a64-r-pinctrl
233            - allwinner,sun50i-a100-r-pinctrl
234            - nextthing,gr8-pinctrl
235
236    then:
237      properties:
238        interrupts:
239          minItems: 1
240          maxItems: 1
241
242additionalProperties: false
243
244examples:
245  - |
246    #include <dt-bindings/clock/sun5i-ccu.h>
247
248    pio: pinctrl@1c20800 {
249        compatible = "allwinner,sun5i-a13-pinctrl";
250        reg = <0x01c20800 0x400>;
251        interrupts = <28>;
252        clocks = <&ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>;
253        clock-names = "apb", "hosc", "losc";
254        gpio-controller;
255        interrupt-controller;
256        #interrupt-cells = <3>;
257        #gpio-cells = <3>;
258
259        uart1_pe_pins: uart1-pe-pins {
260            pins = "PE10", "PE11";
261            function = "uart1";
262        };
263
264        uart1_pg_pins: uart1-pg-pins {
265            pins = "PG3", "PG4";
266            function = "uart1";
267        };
268    };
269