xref: /linux/Documentation/devicetree/bindings/phy/samsung,exynos5250-sata-phy.yaml (revision da1d9caf95def6f0320819cf941c9fd1069ba9e1) 
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/samsung,exynos5250-sata-phy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung Exynos5250 SoC SATA PHY
8
9maintainers:
10  - Krzysztof Kozlowski <krzk@kernel.org>
11  - Marek Szyprowski <m.szyprowski@samsung.com>
12  - Sylwester Nawrocki <s.nawrocki@samsung.com>
13
14properties:
15  compatible:
16    const: samsung,exynos5250-sata-phy
17
18  clocks:
19    maxItems: 1
20
21  clock-names:
22    items:
23      - const: sata_phyctrl
24
25  "#phy-cells":
26    const: 0
27
28  reg:
29    maxItems: 1
30
31  samsung,syscon-phandle:
32    $ref: /schemas/types.yaml#/definitions/phandle
33    description:
34      Phandle to PMU system controller interface.
35
36  samsung,exynos-sataphy-i2c-phandle:
37    $ref: /schemas/types.yaml#/definitions/phandle
38    description:
39      Phandle to I2C SATA interface.
40
41required:
42  - compatible
43  - clocks
44  - clock-names
45  - "#phy-cells"
46  - reg
47  - samsung,syscon-phandle
48  - samsung,exynos-sataphy-i2c-phandle
49
50additionalProperties: false
51
52examples:
53  - |
54    #include <dt-bindings/clock/exynos5250.h>
55
56    phy@12170000 {
57        compatible = "samsung,exynos5250-sata-phy";
58        reg = <0x12170000 0x1ff>;
59        clocks = <&clock CLK_SATA_PHYCTRL>;
60        clock-names = "sata_phyctrl";
61        #phy-cells = <0>;
62        samsung,syscon-phandle = <&pmu_system_controller>;
63        samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
64    };
65