1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/phy/rockchip,rk3228-hdmi-phy.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Rockchip HDMI PHY with Innosilicon IP block 8 9maintainers: 10 - Heiko Stuebner <heiko@sntech.de> 11 12properties: 13 compatible: 14 enum: 15 - rockchip,rk3228-hdmi-phy 16 - rockchip,rk3328-hdmi-phy 17 18 reg: 19 maxItems: 1 20 21 clocks: 22 maxItems: 3 23 24 clock-names: 25 items: 26 - const: sysclk 27 - const: refoclk 28 - const: refpclk 29 30 clock-output-names: 31 description: 32 The hdmiphy output clock name, that gets fed back to the CRU. 33 34 "#clock-cells": 35 const: 0 36 37 interrupts: 38 maxItems: 1 39 40 nvmem-cells: 41 maxItems: 1 42 description: A phandle + nvmem specifier for the cpu-version efuse 43 for adjustment to some frequency settings, depending on cpu-version 44 45 nvmem-cell-names: 46 items: 47 - const: cpu-version 48 49 '#phy-cells': 50 const: 0 51 52required: 53 - compatible 54 - reg 55 - clocks 56 - clock-names 57 - clock-output-names 58 - '#clock-cells' 59 - '#phy-cells' 60 61allOf: 62 - if: 63 properties: 64 compatible: 65 contains: 66 const: rockchip,rk3228-hdmi-phy 67 68 then: 69 properties: 70 interrupts: false 71 72 - if: 73 properties: 74 compatible: 75 contains: 76 const: rockchip,rk3328-hdmi-phy 77 78 then: 79 required: 80 - interrupts 81 82additionalProperties: false 83 84examples: 85 - | 86 87 #include <dt-bindings/clock/rk3228-cru.h> 88 hdmi_phy: phy@12030000 { 89 compatible = "rockchip,rk3228-hdmi-phy"; 90 reg = <0x12030000 0x10000>; 91 #phy-cells = <0>; 92 clocks = <&cru PCLK_HDMI_PHY>, <&xin24m>, <&cru DCLK_HDMI_PHY>; 93 clock-names = "sysclk", "refoclk", "refpclk"; 94 #clock-cells = <0>; 95 96 clock-output-names = "hdmi_phy"; 97 }; 98