xref: /linux/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml (revision 2eff01ee2881becc9daaa0d53477ec202136b1f4)
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/rockchip,inno-usb2phy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Rockchip USB2.0 phy with inno IP block
8
9maintainers:
10  - Heiko Stuebner <heiko@sntech.de>
11
12properties:
13  compatible:
14    enum:
15      - rockchip,px30-usb2phy
16      - rockchip,rk3128-usb2phy
17      - rockchip,rk3228-usb2phy
18      - rockchip,rk3308-usb2phy
19      - rockchip,rk3328-usb2phy
20      - rockchip,rk3366-usb2phy
21      - rockchip,rk3399-usb2phy
22      - rockchip,rk3568-usb2phy
23      - rockchip,rk3576-usb2phy
24      - rockchip,rk3588-usb2phy
25      - rockchip,rv1108-usb2phy
26
27  reg:
28    maxItems: 1
29
30  clock-output-names:
31    description:
32      The usb 480m output clock name.
33
34  "#clock-cells":
35    const: 0
36
37  clocks:
38    minItems: 1
39    maxItems: 3
40
41  clock-names:
42    minItems: 1
43    items:
44      - const: phyclk
45      - const: aclk
46      - const: aclk_slv
47
48  assigned-clocks:
49    description:
50      Phandle of the usb 480m clock.
51
52  assigned-clock-parents:
53    description:
54      Parent of the usb 480m clock.
55      Select between usb-phy output 480m and xin24m.
56      Refer to clk/clock-bindings.txt for generic clock consumer properties.
57
58  extcon:
59    description:
60      Phandle to the extcon device providing the cable state for the otg phy.
61
62  interrupts:
63    description: Muxed interrupt for both ports
64    maxItems: 1
65
66  resets:
67    maxItems: 2
68
69  reset-names:
70    items:
71      - const: phy
72      - const: apb
73
74  rockchip,usbgrf:
75    $ref: /schemas/types.yaml#/definitions/phandle
76    description:
77      Phandle to the syscon managing the 'usb general register files'.
78      When set the driver will request its phandle as one companion-grf
79      for some special SoCs (e.g rv1108).
80
81  host-port:
82    type: object
83    additionalProperties: false
84
85    properties:
86      "#phy-cells":
87        const: 0
88
89      interrupts:
90        description: host linestate interrupt
91        maxItems: 1
92
93      interrupt-names:
94        const: linestate
95
96      phy-supply:
97        description:
98          Phandle to a regulator that provides power to VBUS.
99          See ./phy-bindings.txt for details.
100
101    required:
102      - "#phy-cells"
103
104  otg-port:
105    type: object
106    additionalProperties: false
107
108    properties:
109      "#phy-cells":
110        const: 0
111
112      interrupts:
113        minItems: 1
114        maxItems: 3
115
116      interrupt-names:
117        oneOf:
118          - const: linestate
119          - const: otg-mux
120          - items:
121              - const: otg-bvalid
122              - const: otg-id
123              - const: linestate
124
125      phy-supply:
126        description:
127          Phandle to a regulator that provides power to VBUS.
128          See ./phy-bindings.txt for details.
129
130    required:
131      - "#phy-cells"
132
133required:
134  - compatible
135  - reg
136  - clock-output-names
137  - "#clock-cells"
138
139anyOf:
140  - required:
141      - otg-port
142  - required:
143      - host-port
144
145allOf:
146  - if:
147      properties:
148        compatible:
149          contains:
150            enum:
151              - rockchip,rk3568-usb2phy
152              - rockchip,rk3588-usb2phy
153
154    then:
155      properties:
156        host-port:
157          properties:
158            interrupts: false
159
160        otg-port:
161          properties:
162            interrupts: false
163
164      required:
165        - interrupts
166
167    else:
168      properties:
169        interrupts: false
170
171        host-port:
172          required:
173            - interrupts
174            - interrupt-names
175
176        otg-port:
177          required:
178            - interrupts
179            - interrupt-names
180
181  - if:
182      properties:
183        compatible:
184          contains:
185            enum:
186              - rockchip,px30-usb2phy
187              - rockchip,rk3128-usb2phy
188              - rockchip,rk3228-usb2phy
189              - rockchip,rk3308-usb2phy
190              - rockchip,rk3328-usb2phy
191              - rockchip,rk3366-usb2phy
192              - rockchip,rk3399-usb2phy
193              - rockchip,rk3568-usb2phy
194              - rockchip,rk3588-usb2phy
195              - rockchip,rv1108-usb2phy
196    then:
197      properties:
198        clocks:
199          maxItems: 1
200        clock-names:
201          maxItems: 1
202
203  - if:
204      properties:
205        compatible:
206          contains:
207            enum:
208              - rockchip,rk3576-usb2phy
209    then:
210      properties:
211        clocks:
212          minItems: 3
213        clock-names:
214          minItems: 3
215
216additionalProperties: false
217
218examples:
219  - |
220    #include <dt-bindings/clock/rk3399-cru.h>
221    #include <dt-bindings/interrupt-controller/arm-gic.h>
222    #include <dt-bindings/interrupt-controller/irq.h>
223    u2phy0: usb2phy@e450 {
224      compatible = "rockchip,rk3399-usb2phy";
225      reg = <0xe450 0x10>;
226      clocks = <&cru SCLK_USB2PHY0_REF>;
227      clock-names = "phyclk";
228      clock-output-names = "clk_usbphy0_480m";
229      #clock-cells = <0>;
230
231      u2phy0_host: host-port {
232        interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;
233        interrupt-names = "linestate";
234        #phy-cells = <0>;
235      };
236
237      u2phy0_otg: otg-port {
238        interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>,
239                     <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>,
240                     <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>;
241        interrupt-names = "otg-bvalid", "otg-id", "linestate";
242        #phy-cells = <0>;
243      };
244    };
245