1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/phy/rockchip,inno-usb2phy.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Rockchip USB2.0 phy with inno IP block 8 9maintainers: 10 - Heiko Stuebner <heiko@sntech.de> 11 12properties: 13 compatible: 14 enum: 15 - rockchip,px30-usb2phy 16 - rockchip,rk3036-usb2phy 17 - rockchip,rk3128-usb2phy 18 - rockchip,rk3228-usb2phy 19 - rockchip,rk3308-usb2phy 20 - rockchip,rk3328-usb2phy 21 - rockchip,rk3366-usb2phy 22 - rockchip,rk3399-usb2phy 23 - rockchip,rk3528-usb2phy 24 - rockchip,rk3562-usb2phy 25 - rockchip,rk3568-usb2phy 26 - rockchip,rk3576-usb2phy 27 - rockchip,rk3588-usb2phy 28 - rockchip,rv1108-usb2phy 29 30 reg: 31 maxItems: 1 32 33 clock-output-names: 34 description: 35 The usb 480m output clock name. 36 37 "#clock-cells": 38 const: 0 39 40 clocks: 41 minItems: 1 42 maxItems: 3 43 44 clock-names: 45 oneOf: 46 - const: phyclk 47 - items: 48 - const: phyclk 49 - const: pclk 50 - items: 51 - const: phyclk 52 - const: aclk 53 - const: aclk_slv 54 55 assigned-clocks: 56 description: 57 Phandle of the usb 480m clock. 58 59 assigned-clock-parents: 60 description: 61 Parent of the usb 480m clock. 62 Select between usb-phy output 480m and xin24m. 63 Refer to clk/clock-bindings.txt for generic clock consumer properties. 64 65 extcon: 66 description: 67 Phandle to the extcon device providing the cable state for the otg phy. 68 69 interrupts: 70 description: Muxed interrupt for both ports 71 maxItems: 1 72 73 power-domains: 74 maxItems: 1 75 76 resets: 77 maxItems: 2 78 79 reset-names: 80 items: 81 - const: phy 82 - const: apb 83 84 rockchip,usbgrf: 85 $ref: /schemas/types.yaml#/definitions/phandle 86 description: 87 Phandle to the syscon managing the 'usb general register files'. 88 When set the driver will request its phandle as one companion-grf 89 for some special SoCs (e.g rv1108). 90 91 host-port: 92 type: object 93 additionalProperties: false 94 95 properties: 96 "#phy-cells": 97 const: 0 98 99 interrupts: 100 description: host linestate interrupt 101 maxItems: 1 102 103 interrupt-names: 104 const: linestate 105 106 phy-supply: 107 description: 108 Phandle to a regulator that provides power to VBUS. 109 See ./phy-bindings.txt for details. 110 111 required: 112 - "#phy-cells" 113 114 otg-port: 115 type: object 116 additionalProperties: false 117 118 properties: 119 "#phy-cells": 120 const: 0 121 122 interrupts: 123 minItems: 1 124 maxItems: 3 125 126 interrupt-names: 127 oneOf: 128 - const: linestate 129 - const: otg-mux 130 - items: 131 - const: otg-bvalid 132 - const: otg-id 133 - const: linestate 134 135 phy-supply: 136 description: 137 Phandle to a regulator that provides power to VBUS. 138 See ./phy-bindings.txt for details. 139 140 required: 141 - "#phy-cells" 142 143required: 144 - compatible 145 - reg 146 - clock-output-names 147 - "#clock-cells" 148 149anyOf: 150 - required: 151 - otg-port 152 - required: 153 - host-port 154 155allOf: 156 - if: 157 properties: 158 compatible: 159 contains: 160 enum: 161 - rockchip,rk3528-usb2phy 162 - rockchip,rk3568-usb2phy 163 - rockchip,rv1108-usb2phy 164 then: 165 required: 166 - rockchip,usbgrf 167 else: 168 properties: 169 rockchip,usbgrf: false 170 171 - if: 172 properties: 173 compatible: 174 contains: 175 enum: 176 - rockchip,rk3568-usb2phy 177 - rockchip,rk3588-usb2phy 178 179 then: 180 properties: 181 host-port: 182 properties: 183 interrupts: false 184 185 otg-port: 186 properties: 187 interrupts: false 188 189 required: 190 - interrupts 191 192 else: 193 properties: 194 interrupts: false 195 196 host-port: 197 required: 198 - interrupts 199 - interrupt-names 200 201 otg-port: 202 required: 203 - interrupts 204 - interrupt-names 205 206 - if: 207 properties: 208 compatible: 209 contains: 210 enum: 211 - rockchip,px30-usb2phy 212 - rockchip,rk3036-usb2phy 213 - rockchip,rk3128-usb2phy 214 - rockchip,rk3228-usb2phy 215 - rockchip,rk3308-usb2phy 216 - rockchip,rk3328-usb2phy 217 - rockchip,rk3366-usb2phy 218 - rockchip,rk3399-usb2phy 219 - rockchip,rk3562-usb2phy 220 - rockchip,rk3568-usb2phy 221 - rockchip,rk3588-usb2phy 222 - rockchip,rv1108-usb2phy 223 then: 224 properties: 225 clocks: 226 maxItems: 1 227 clock-names: 228 maxItems: 1 229 230 - if: 231 properties: 232 compatible: 233 contains: 234 enum: 235 - rockchip,rk3528-usb2phy 236 then: 237 properties: 238 clocks: 239 minItems: 2 240 clock-names: 241 minItems: 2 242 243 - if: 244 properties: 245 compatible: 246 contains: 247 enum: 248 - rockchip,rk3576-usb2phy 249 then: 250 properties: 251 clocks: 252 minItems: 3 253 clock-names: 254 minItems: 3 255 256additionalProperties: false 257 258examples: 259 - | 260 #include <dt-bindings/clock/rk3399-cru.h> 261 #include <dt-bindings/interrupt-controller/arm-gic.h> 262 #include <dt-bindings/interrupt-controller/irq.h> 263 u2phy0: usb2phy@e450 { 264 compatible = "rockchip,rk3399-usb2phy"; 265 reg = <0xe450 0x10>; 266 clocks = <&cru SCLK_USB2PHY0_REF>; 267 clock-names = "phyclk"; 268 clock-output-names = "clk_usbphy0_480m"; 269 #clock-cells = <0>; 270 271 u2phy0_host: host-port { 272 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>; 273 interrupt-names = "linestate"; 274 #phy-cells = <0>; 275 }; 276 277 u2phy0_otg: otg-port { 278 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>, 279 <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>, 280 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>; 281 interrupt-names = "otg-bvalid", "otg-id", "linestate"; 282 #phy-cells = <0>; 283 }; 284 }; 285