xref: /linux/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml (revision 34f7c6e7d4396090692a09789db231e12cb4762b) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/renesas,usb2-phy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas R-Car generation 3 USB 2.0 PHY
8
9maintainers:
10  - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
11
12properties:
13  compatible:
14    oneOf:
15      - items:
16          - const: renesas,usb2-phy-r8a77470 # RZ/G1C
17
18      - items:
19          - enum:
20              - renesas,usb2-phy-r7s9210  # RZ/A2
21              - renesas,usb2-phy-r8a774a1 # RZ/G2M
22              - renesas,usb2-phy-r8a774b1 # RZ/G2N
23              - renesas,usb2-phy-r8a774c0 # RZ/G2E
24              - renesas,usb2-phy-r8a774e1 # RZ/G2H
25              - renesas,usb2-phy-r8a7795  # R-Car H3
26              - renesas,usb2-phy-r8a7796  # R-Car M3-W
27              - renesas,usb2-phy-r8a77961 # R-Car M3-W+
28              - renesas,usb2-phy-r8a77965 # R-Car M3-N
29              - renesas,usb2-phy-r8a77990 # R-Car E3
30              - renesas,usb2-phy-r8a77995 # R-Car D3
31          - const: renesas,rcar-gen3-usb2-phy
32
33      - items:
34          - enum:
35              - renesas,usb2-phy-r9a07g044 # RZ/G2{L,LC}
36              - renesas,usb2-phy-r9a07g054 # RZ/V2L
37          - const: renesas,rzg2l-usb2-phy
38
39  reg:
40    maxItems: 1
41
42  clocks:
43    minItems: 1
44    maxItems: 2
45
46  clock-names:
47    minItems: 1
48    items:
49      - const: fck
50      - const: usb_x1
51
52  '#phy-cells':
53    enum: [0, 1]  # and 0 is deprecated.
54    description: |
55      The phandle's argument in the PHY specifier is the INT_STATUS bit of
56      controller.
57      - 1 = USBH_INTA (OHCI)
58      - 2 = USBH_INTB (EHCI)
59      - 3 = UCOM_INT (OTG and BC)
60
61  interrupts:
62    maxItems: 1
63
64  power-domains:
65    maxItems: 1
66
67  resets:
68    minItems: 1
69    items:
70      - description: reset of USB 2.0 host side
71      - description: reset of USB 2.0 peripheral side
72
73  vbus-supply:
74    description: |
75      Phandle to a regulator that provides power to the VBUS. This regulator
76      will be managed during the PHY power on/off sequence.
77
78  renesas,no-otg-pins:
79    $ref: /schemas/types.yaml#/definitions/flag
80    description: |
81      specify when a board does not provide proper otg pins.
82
83  dr_mode: true
84
85if:
86  properties:
87    compatible:
88      contains:
89        const: renesas,usb2-phy-r7s9210
90then:
91  required:
92    - clock-names
93
94required:
95  - compatible
96  - reg
97  - clocks
98  - '#phy-cells'
99
100allOf:
101  - if:
102      properties:
103        compatible:
104          contains:
105            const: renesas,rzg2l-usb2-phy
106    then:
107      required:
108        - resets
109
110additionalProperties: false
111
112examples:
113  - |
114    #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
115    #include <dt-bindings/interrupt-controller/arm-gic.h>
116    #include <dt-bindings/power/r8a7795-sysc.h>
117
118    usb-phy@ee080200 {
119        compatible = "renesas,usb2-phy-r8a7795", "renesas,rcar-gen3-usb2-phy";
120        reg = <0xee080200 0x700>;
121        interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
122        clocks = <&cpg CPG_MOD 703>;
123        #phy-cells = <1>;
124    };
125
126    usb-phy@ee0a0200 {
127        compatible = "renesas,usb2-phy-r8a7795", "renesas,rcar-gen3-usb2-phy";
128        reg = <0xee0a0200 0x700>;
129        clocks = <&cpg CPG_MOD 702>;
130        #phy-cells = <1>;
131    };
132