1*92086b88SGeert Uytterhoeven# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*92086b88SGeert Uytterhoeven%YAML 1.2 3*92086b88SGeert Uytterhoeven--- 4*92086b88SGeert Uytterhoeven$id: http://devicetree.org/schemas/phy/renesas,rcar-gen2-usb-phy.yaml# 5*92086b88SGeert Uytterhoeven$schema: http://devicetree.org/meta-schemas/core.yaml# 6*92086b88SGeert Uytterhoeven 7*92086b88SGeert Uytterhoeventitle: Renesas R-Car Gen2 USB PHY 8*92086b88SGeert Uytterhoeven 9*92086b88SGeert Uytterhoevenmaintainers: 10*92086b88SGeert Uytterhoeven - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> 11*92086b88SGeert Uytterhoeven 12*92086b88SGeert Uytterhoevenproperties: 13*92086b88SGeert Uytterhoeven compatible: 14*92086b88SGeert Uytterhoeven items: 15*92086b88SGeert Uytterhoeven - enum: 16*92086b88SGeert Uytterhoeven - renesas,usb-phy-r8a7742 # RZ/G1H 17*92086b88SGeert Uytterhoeven - renesas,usb-phy-r8a7743 # RZ/G1M 18*92086b88SGeert Uytterhoeven - renesas,usb-phy-r8a7744 # RZ/G1N 19*92086b88SGeert Uytterhoeven - renesas,usb-phy-r8a7745 # RZ/G1E 20*92086b88SGeert Uytterhoeven - renesas,usb-phy-r8a77470 # RZ/G1C 21*92086b88SGeert Uytterhoeven - renesas,usb-phy-r8a7790 # R-Car H2 22*92086b88SGeert Uytterhoeven - renesas,usb-phy-r8a7791 # R-Car M2-W 23*92086b88SGeert Uytterhoeven - renesas,usb-phy-r8a7794 # R-Car E2 24*92086b88SGeert Uytterhoeven - const: renesas,rcar-gen2-usb-phy # R-Car Gen2 or RZ/G1 25*92086b88SGeert Uytterhoeven 26*92086b88SGeert Uytterhoeven reg: 27*92086b88SGeert Uytterhoeven maxItems: 1 28*92086b88SGeert Uytterhoeven 29*92086b88SGeert Uytterhoeven '#address-cells': 30*92086b88SGeert Uytterhoeven const: 1 31*92086b88SGeert Uytterhoeven 32*92086b88SGeert Uytterhoeven '#size-cells': 33*92086b88SGeert Uytterhoeven const: 0 34*92086b88SGeert Uytterhoeven 35*92086b88SGeert Uytterhoeven clocks: 36*92086b88SGeert Uytterhoeven maxItems: 1 37*92086b88SGeert Uytterhoeven 38*92086b88SGeert Uytterhoeven clock-names: 39*92086b88SGeert Uytterhoeven items: 40*92086b88SGeert Uytterhoeven - const: usbhs 41*92086b88SGeert Uytterhoeven 42*92086b88SGeert Uytterhoeven power-domains: 43*92086b88SGeert Uytterhoeven maxItems: 1 44*92086b88SGeert Uytterhoeven 45*92086b88SGeert Uytterhoeven resets: 46*92086b88SGeert Uytterhoeven maxItems: 1 47*92086b88SGeert Uytterhoeven 48*92086b88SGeert UytterhoevenpatternProperties: 49*92086b88SGeert Uytterhoeven "^usb-phy@[02]$": 50*92086b88SGeert Uytterhoeven type: object 51*92086b88SGeert Uytterhoeven description: Subnode corresponding to a USB channel. 52*92086b88SGeert Uytterhoeven 53*92086b88SGeert Uytterhoeven properties: 54*92086b88SGeert Uytterhoeven reg: 55*92086b88SGeert Uytterhoeven description: FIXME RZ/G1C supports channel 0 only 56*92086b88SGeert Uytterhoeven enum: [0, 2] 57*92086b88SGeert Uytterhoeven 58*92086b88SGeert Uytterhoeven '#phy-cells': 59*92086b88SGeert Uytterhoeven description: | 60*92086b88SGeert Uytterhoeven The phandle's argument in the PHY specifier is the USB controller 61*92086b88SGeert Uytterhoeven selector for the USB channel. 62*92086b88SGeert Uytterhoeven For RZ/G1C: 63*92086b88SGeert Uytterhoeven - 0 for EHCI/OHCI 64*92086b88SGeert Uytterhoeven - 1 for HS-USB 65*92086b88SGeert Uytterhoeven For all other SoCS: 66*92086b88SGeert Uytterhoeven - 0 for PCI EHCI/OHCI 67*92086b88SGeert Uytterhoeven - 1 for HS-USB (channel 0) or xHCI (channel 2) 68*92086b88SGeert Uytterhoeven const: 1 69*92086b88SGeert Uytterhoeven 70*92086b88SGeert Uytterhoeven required: 71*92086b88SGeert Uytterhoeven - reg 72*92086b88SGeert Uytterhoeven - '#phy-cells' 73*92086b88SGeert Uytterhoeven 74*92086b88SGeert Uytterhoeven additionalProperties: false 75*92086b88SGeert Uytterhoeven 76*92086b88SGeert Uytterhoevenrequired: 77*92086b88SGeert Uytterhoeven - compatible 78*92086b88SGeert Uytterhoeven - reg 79*92086b88SGeert Uytterhoeven - '#address-cells' 80*92086b88SGeert Uytterhoeven - '#size-cells' 81*92086b88SGeert Uytterhoeven - clocks 82*92086b88SGeert Uytterhoeven - clock-names 83*92086b88SGeert Uytterhoeven - resets 84*92086b88SGeert Uytterhoeven - power-domains 85*92086b88SGeert Uytterhoeven - usb-phy@0 86*92086b88SGeert Uytterhoeven 87*92086b88SGeert Uytterhoevenif: 88*92086b88SGeert Uytterhoeven properties: 89*92086b88SGeert Uytterhoeven compatible: 90*92086b88SGeert Uytterhoeven contains: 91*92086b88SGeert Uytterhoeven const: renesas,usb-phy-r8a77470 92*92086b88SGeert Uytterhoeventhen: 93*92086b88SGeert Uytterhoeven properties: 94*92086b88SGeert Uytterhoeven usb-phy@2: false 95*92086b88SGeert Uytterhoevenelse: 96*92086b88SGeert Uytterhoeven required: 97*92086b88SGeert Uytterhoeven - usb-phy@2 98*92086b88SGeert Uytterhoeven 99*92086b88SGeert UytterhoevenadditionalProperties: false 100*92086b88SGeert Uytterhoeven 101*92086b88SGeert Uytterhoevenexamples: 102*92086b88SGeert Uytterhoeven - | 103*92086b88SGeert Uytterhoeven #include <dt-bindings/clock/r8a7790-cpg-mssr.h> 104*92086b88SGeert Uytterhoeven #include <dt-bindings/power/r8a7790-sysc.h> 105*92086b88SGeert Uytterhoeven usb-phy-controller@e6590100 { 106*92086b88SGeert Uytterhoeven compatible = "renesas,usb-phy-r8a7790", "renesas,rcar-gen2-usb-phy"; 107*92086b88SGeert Uytterhoeven reg = <0xe6590100 0x100>; 108*92086b88SGeert Uytterhoeven #address-cells = <1>; 109*92086b88SGeert Uytterhoeven #size-cells = <0>; 110*92086b88SGeert Uytterhoeven clocks = <&cpg CPG_MOD 704>; 111*92086b88SGeert Uytterhoeven clock-names = "usbhs"; 112*92086b88SGeert Uytterhoeven power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 113*92086b88SGeert Uytterhoeven resets = <&cpg 704>; 114*92086b88SGeert Uytterhoeven 115*92086b88SGeert Uytterhoeven usb0: usb-phy@0 { 116*92086b88SGeert Uytterhoeven reg = <0>; 117*92086b88SGeert Uytterhoeven #phy-cells = <1>; 118*92086b88SGeert Uytterhoeven }; 119*92086b88SGeert Uytterhoeven usb2: usb-phy@2 { 120*92086b88SGeert Uytterhoeven reg = <2>; 121*92086b88SGeert Uytterhoeven #phy-cells = <1>; 122*92086b88SGeert Uytterhoeven }; 123*92086b88SGeert Uytterhoeven }; 124