xref: /linux/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml (revision 5f5598d945e2a69f764aa5c2074dad73e23bcfcb)
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/qcom,snps-eusb2-phy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm SNPS eUSB2 phy controller
8
9maintainers:
10  - Abel Vesa <abel.vesa@linaro.org>
11
12description:
13  eUSB2 controller supports LS/FS/HS usb connectivity on Qualcomm chipsets.
14
15properties:
16  compatible:
17    oneOf:
18      - items:
19          - enum:
20              - qcom,milos-snps-eusb2-phy
21              - qcom,sar2130p-snps-eusb2-phy
22              - qcom,sdx75-snps-eusb2-phy
23              - qcom,sm8650-snps-eusb2-phy
24              - qcom,x1e80100-snps-eusb2-phy
25          - const: qcom,sm8550-snps-eusb2-phy
26      - const: qcom,sm8550-snps-eusb2-phy
27
28  reg:
29    maxItems: 1
30
31  "#phy-cells":
32    const: 0
33
34  clocks:
35    items:
36      - description: ref
37
38  clock-names:
39    items:
40      - const: ref
41
42  resets:
43    maxItems: 1
44
45  phys:
46    maxItems: 1
47    description:
48      Phandle to eUSB2 to USB 2.0 repeater
49
50  vdd-supply:
51    description:
52      Phandle to 0.88V regulator supply to PHY digital circuit.
53
54  vdda12-supply:
55    description:
56      Phandle to 1.2V regulator supply to PHY refclk pll block.
57
58required:
59  - compatible
60  - reg
61  - "#phy-cells"
62  - clocks
63  - clock-names
64  - vdd-supply
65  - vdda12-supply
66  - resets
67
68additionalProperties: false
69
70examples:
71  - |
72    #include <dt-bindings/clock/qcom,sm8550-gcc.h>
73    #include <dt-bindings/clock/qcom,rpmh.h>
74    #include <dt-bindings/clock/qcom,sm8550-tcsr.h>
75
76    usb_1_hsphy: phy@88e3000 {
77        compatible = "qcom,sm8550-snps-eusb2-phy";
78        reg = <0x88e3000 0x154>;
79        #phy-cells = <0>;
80
81        clocks = <&tcsrcc TCSR_USB2_CLKREF_EN>;
82        clock-names = "ref";
83
84        vdd-supply = <&vreg_l1e_0p88>;
85        vdda12-supply = <&vreg_l3e_1p2>;
86
87        resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
88    };
89