1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm QMP PHY controller (USB, SC8280XP) 8 9maintainers: 10 - Vinod Koul <vkoul@kernel.org> 11 12description: 13 The QMP PHY controller supports physical layer functionality for a number of 14 controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB. 15 16properties: 17 compatible: 18 enum: 19 - qcom,ipq6018-qmp-usb3-phy 20 - qcom,ipq8074-qmp-usb3-phy 21 - qcom,ipq9574-qmp-usb3-phy 22 - qcom,msm8996-qmp-usb3-phy 23 - qcom,qdu1000-qmp-usb3-uni-phy 24 - qcom,sa8775p-qmp-usb3-uni-phy 25 - qcom,sc8180x-qmp-usb3-uni-phy 26 - qcom,sc8280xp-qmp-usb3-uni-phy 27 - qcom,sdm845-qmp-usb3-uni-phy 28 - qcom,sdx55-qmp-usb3-uni-phy 29 - qcom,sdx65-qmp-usb3-uni-phy 30 - qcom,sdx75-qmp-usb3-uni-phy 31 - qcom,sm8150-qmp-usb3-uni-phy 32 - qcom,sm8250-qmp-usb3-uni-phy 33 - qcom,sm8350-qmp-usb3-uni-phy 34 - qcom,x1e80100-qmp-usb3-uni-phy 35 36 37 reg: 38 maxItems: 1 39 40 clocks: 41 minItems: 4 42 maxItems: 5 43 44 clock-names: 45 minItems: 4 46 maxItems: 5 47 48 power-domains: 49 maxItems: 1 50 51 resets: 52 maxItems: 2 53 54 reset-names: 55 items: 56 - const: phy 57 - const: phy_phy 58 59 vdda-phy-supply: true 60 61 vdda-pll-supply: true 62 63 "#clock-cells": 64 const: 0 65 66 clock-output-names: 67 maxItems: 1 68 69 "#phy-cells": 70 const: 0 71 72required: 73 - compatible 74 - reg 75 - clocks 76 - clock-names 77 - resets 78 - reset-names 79 - vdda-phy-supply 80 - vdda-pll-supply 81 - "#clock-cells" 82 - clock-output-names 83 - "#phy-cells" 84 85allOf: 86 - if: 87 properties: 88 compatible: 89 contains: 90 enum: 91 - qcom,ipq6018-qmp-usb3-phy 92 - qcom,ipq8074-qmp-usb3-phy 93 - qcom,ipq9574-qmp-usb3-phy 94 - qcom,msm8996-qmp-usb3-phy 95 - qcom,sdx55-qmp-usb3-uni-phy 96 - qcom,sdx65-qmp-usb3-uni-phy 97 - qcom,sdx75-qmp-usb3-uni-phy 98 then: 99 properties: 100 clocks: 101 maxItems: 4 102 clock-names: 103 items: 104 - const: aux 105 - const: ref 106 - const: cfg_ahb 107 - const: pipe 108 109 - if: 110 properties: 111 compatible: 112 contains: 113 enum: 114 - qcom,qdu1000-qmp-usb3-uni-phy 115 - qcom,sa8775p-qmp-usb3-uni-phy 116 - qcom,sc8180x-qmp-usb3-uni-phy 117 - qcom,sc8280xp-qmp-usb3-uni-phy 118 - qcom,sm8150-qmp-usb3-uni-phy 119 - qcom,sm8250-qmp-usb3-uni-phy 120 - qcom,sm8350-qmp-usb3-uni-phy 121 - qcom,x1e80100-qmp-usb3-uni-phy 122 then: 123 properties: 124 clocks: 125 maxItems: 4 126 clock-names: 127 items: 128 - const: aux 129 - const: ref 130 - const: com_aux 131 - const: pipe 132 133 - if: 134 properties: 135 compatible: 136 contains: 137 enum: 138 - qcom,sdm845-qmp-usb3-uni-phy 139 then: 140 properties: 141 clocks: 142 maxItems: 5 143 clock-names: 144 items: 145 - const: aux 146 - const: cfg_ahb 147 - const: ref 148 - const: com_aux 149 - const: pipe 150 151 - if: 152 properties: 153 compatible: 154 contains: 155 enum: 156 - qcom,sa8775p-qmp-usb3-uni-phy 157 - qcom,sc8180x-qmp-usb3-uni-phy 158 - qcom,sc8280xp-qmp-usb3-uni-phy 159 - qcom,x1e80100-qmp-usb3-uni-phy 160 then: 161 required: 162 - power-domains 163 164additionalProperties: false 165 166examples: 167 - | 168 #include <dt-bindings/clock/qcom,gcc-sc8280xp.h> 169 #include <dt-bindings/clock/qcom,rpmh.h> 170 171 phy@88ef000 { 172 compatible = "qcom,sc8280xp-qmp-usb3-uni-phy"; 173 reg = <0x088ef000 0x2000>; 174 175 clocks = <&gcc GCC_USB3_MP_PHY_AUX_CLK>, 176 <&gcc GCC_USB3_MP0_CLKREF_CLK>, 177 <&gcc GCC_USB3_MP_PHY_COM_AUX_CLK>, 178 <&gcc GCC_USB3_MP_PHY_PIPE_0_CLK>; 179 clock-names = "aux", "ref", "com_aux", "pipe"; 180 181 power-domains = <&gcc USB30_MP_GDSC>; 182 183 resets = <&gcc GCC_USB3_UNIPHY_MP0_BCR>, 184 <&gcc GCC_USB3UNIPHY_PHY_MP0_BCR>; 185 reset-names = "phy", "phy_phy"; 186 187 vdda-phy-supply = <&vreg_l3a>; 188 vdda-pll-supply = <&vreg_l5a>; 189 190 #clock-cells = <0>; 191 clock-output-names = "usb2_phy0_pipe_clk"; 192 193 #phy-cells = <0>; 194 }; 195