xref: /linux/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml (revision 561add0da6d3d07c9bccb0832fb6ed5619167d26) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-ufs-phy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm QMP PHY controller (UFS, SC8280XP)
8
9maintainers:
10  - Vinod Koul <vkoul@kernel.org>
11
12description:
13  The QMP PHY controller supports physical layer functionality for a number of
14  controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
15
16properties:
17  compatible:
18    enum:
19      - qcom,msm8996-qmp-ufs-phy
20      - qcom,msm8998-qmp-ufs-phy
21      - qcom,sa8775p-qmp-ufs-phy
22      - qcom,sc8180x-qmp-ufs-phy
23      - qcom,sc8280xp-qmp-ufs-phy
24      - qcom,sdm845-qmp-ufs-phy
25      - qcom,sm6115-qmp-ufs-phy
26      - qcom,sm6125-qmp-ufs-phy
27      - qcom,sm6350-qmp-ufs-phy
28      - qcom,sm7150-qmp-ufs-phy
29      - qcom,sm8150-qmp-ufs-phy
30      - qcom,sm8250-qmp-ufs-phy
31      - qcom,sm8350-qmp-ufs-phy
32      - qcom,sm8450-qmp-ufs-phy
33      - qcom,sm8550-qmp-ufs-phy
34
35  reg:
36    maxItems: 1
37
38  clocks:
39    minItems: 1
40    maxItems: 3
41
42  clock-names:
43    minItems: 1
44    items:
45      - const: ref
46      - const: ref_aux
47      - const: qref
48
49  power-domains:
50    maxItems: 1
51
52  resets:
53    maxItems: 1
54
55  reset-names:
56    items:
57      - const: ufsphy
58
59  vdda-phy-supply: true
60
61  vdda-pll-supply: true
62
63  "#clock-cells":
64    const: 1
65
66  "#phy-cells":
67    const: 0
68
69required:
70  - compatible
71  - reg
72  - clocks
73  - clock-names
74  - power-domains
75  - resets
76  - reset-names
77  - vdda-phy-supply
78  - vdda-pll-supply
79  - "#phy-cells"
80
81allOf:
82  - if:
83      properties:
84        compatible:
85          contains:
86            enum:
87              - qcom,sa8775p-qmp-ufs-phy
88              - qcom,sm8450-qmp-ufs-phy
89    then:
90      properties:
91        clocks:
92          minItems: 3
93        clock-names:
94          minItems: 3
95
96  - if:
97      properties:
98        compatible:
99          contains:
100            enum:
101              - qcom,msm8998-qmp-ufs-phy
102              - qcom,sc8180x-qmp-ufs-phy
103              - qcom,sc8280xp-qmp-ufs-phy
104              - qcom,sdm845-qmp-ufs-phy
105              - qcom,sm6115-qmp-ufs-phy
106              - qcom,sm6125-qmp-ufs-phy
107              - qcom,sm6350-qmp-ufs-phy
108              - qcom,sm7150-qmp-ufs-phy
109              - qcom,sm8150-qmp-ufs-phy
110              - qcom,sm8250-qmp-ufs-phy
111              - qcom,sm8350-qmp-ufs-phy
112              - qcom,sm8550-qmp-ufs-phy
113    then:
114      properties:
115        clocks:
116          maxItems: 2
117        clock-names:
118          maxItems: 2
119
120  - if:
121      properties:
122        compatible:
123          contains:
124            enum:
125              - qcom,msm8996-qmp-ufs-phy
126    then:
127      properties:
128        clocks:
129          maxItems: 1
130        clock-names:
131          maxItems: 1
132
133additionalProperties: false
134
135examples:
136  - |
137    #include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
138
139    ufs_mem_phy: phy@1d87000 {
140        compatible = "qcom,sc8280xp-qmp-ufs-phy";
141        reg = <0x01d87000 0x1000>;
142
143        clocks = <&gcc GCC_UFS_REF_CLKREF_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
144        clock-names = "ref", "ref_aux";
145
146        power-domains = <&gcc UFS_PHY_GDSC>;
147
148        resets = <&ufs_mem_hc 0>;
149        reset-names = "ufsphy";
150
151        vdda-phy-supply = <&vreg_l6b>;
152        vdda-pll-supply = <&vreg_l3b>;
153
154        #phy-cells = <0>;
155    };
156