1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/phy/qcom,msm8998-qmp-usb3-phy.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm QMP PHY controller (USB, MSM8998) 8 9maintainers: 10 - Vinod Koul <vkoul@kernel.org> 11 12description: 13 The QMP PHY controller supports physical layer functionality for USB-C on 14 several Qualcomm chipsets. 15 16properties: 17 compatible: 18 enum: 19 - qcom,msm8998-qmp-usb3-phy 20 - qcom,qcm2290-qmp-usb3-phy 21 - qcom,qcs615-qmp-usb3-phy 22 - qcom,sdm660-qmp-usb3-phy 23 - qcom,sm6115-qmp-usb3-phy 24 25 reg: 26 maxItems: 1 27 28 clocks: 29 maxItems: 4 30 31 clock-names: 32 maxItems: 4 33 34 resets: 35 maxItems: 2 36 37 reset-names: 38 items: 39 - const: phy 40 - const: phy_phy 41 42 vdda-phy-supply: true 43 44 vdda-pll-supply: true 45 46 "#clock-cells": 47 const: 0 48 49 clock-output-names: 50 maxItems: 1 51 52 "#phy-cells": 53 const: 0 54 55 orientation-switch: 56 description: 57 Flag the PHY as possible handler of USB Type-C orientation switching 58 type: boolean 59 60 qcom,tcsr-reg: 61 $ref: /schemas/types.yaml#/definitions/phandle-array 62 items: 63 - items: 64 - description: phandle to TCSR hardware block 65 - description: offset of the VLS CLAMP register 66 description: Clamp register present in the TCSR 67 68 ports: 69 $ref: /schemas/graph.yaml#/properties/ports 70 properties: 71 port@0: 72 $ref: /schemas/graph.yaml#/properties/port 73 description: Output endpoint of the PHY 74 75 port@1: 76 $ref: /schemas/graph.yaml#/properties/port 77 description: Incoming endpoint from the USB controller 78 79required: 80 - compatible 81 - reg 82 - clocks 83 - clock-names 84 - resets 85 - reset-names 86 - vdda-phy-supply 87 - vdda-pll-supply 88 - "#clock-cells" 89 - clock-output-names 90 - "#phy-cells" 91 - qcom,tcsr-reg 92 93allOf: 94 - if: 95 properties: 96 compatible: 97 contains: 98 enum: 99 - qcom,msm8998-qmp-usb3-phy 100 - qcom,qcs615-qmp-usb3-phy 101 - qcom,sdm660-qmp-usb3-phy 102 then: 103 properties: 104 clocks: 105 maxItems: 4 106 clock-names: 107 items: 108 - const: aux 109 - const: ref 110 - const: cfg_ahb 111 - const: pipe 112 113 - if: 114 properties: 115 compatible: 116 contains: 117 enum: 118 - qcom,qcm2290-qmp-usb3-phy 119 - qcom,sm6115-qmp-usb3-phy 120 then: 121 properties: 122 clocks: 123 maxItems: 4 124 clock-names: 125 items: 126 - const: cfg_ahb 127 - const: ref 128 - const: com_aux 129 - const: pipe 130 131additionalProperties: false 132 133examples: 134 - | 135 #include <dt-bindings/clock/qcom,gcc-msm8998.h> 136 #include <dt-bindings/clock/qcom,rpmh.h> 137 138 phy@c010000 { 139 compatible = "qcom,msm8998-qmp-usb3-phy"; 140 reg = <0x0c010000 0x1000>; 141 142 clocks = <&gcc GCC_USB3_PHY_AUX_CLK>, 143 <&gcc GCC_USB3_CLKREF_CLK>, 144 <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, 145 <&gcc GCC_USB3_PHY_PIPE_CLK>; 146 clock-names = "aux", 147 "ref", 148 "cfg_ahb", 149 "pipe"; 150 clock-output-names = "usb3_phy_pipe_clk_src"; 151 #clock-cells = <0>; 152 #phy-cells = <0>; 153 154 resets = <&gcc GCC_USB3_PHY_BCR>, 155 <&gcc GCC_USB3PHY_PHY_BCR>; 156 reset-names = "phy", 157 "phy_phy"; 158 159 vdda-phy-supply = <&vreg_l1a_0p875>; 160 vdda-pll-supply = <&vreg_l2a_1p2>; 161 162 orientation-switch; 163 164 qcom,tcsr-reg = <&tcsr_regs_1 0x6b244>; 165 166 ports { 167 #address-cells = <1>; 168 #size-cells = <0>; 169 170 port@0 { 171 reg = <0>; 172 173 endpoint { 174 remote-endpoint = <&pmic_typec_mux_in>; 175 }; 176 }; 177 178 port@1 { 179 reg = <1>; 180 181 endpoint { 182 remote-endpoint = <&usb_dwc3_ss>; 183 }; 184 }; 185 }; 186 }; 187