1dcb93f47SJohan Hovold# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2dcb93f47SJohan Hovold%YAML 1.2 3dcb93f47SJohan Hovold--- 4dcb93f47SJohan Hovold$id: http://devicetree.org/schemas/phy/qcom,ipq8074-qmp-pcie-phy.yaml# 5dcb93f47SJohan Hovold$schema: http://devicetree.org/meta-schemas/core.yaml# 6dcb93f47SJohan Hovold 7dcb93f47SJohan Hovoldtitle: Qualcomm QMP PHY controller (PCIe, IPQ8074) 8dcb93f47SJohan Hovold 9dcb93f47SJohan Hovoldmaintainers: 10dcb93f47SJohan Hovold - Vinod Koul <vkoul@kernel.org> 11dcb93f47SJohan Hovold 12dcb93f47SJohan Hovolddescription: 13dcb93f47SJohan Hovold QMP PHY controller supports physical layer functionality for a number of 14dcb93f47SJohan Hovold controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB. 15dcb93f47SJohan Hovold 16dcb93f47SJohan Hovoldproperties: 17dcb93f47SJohan Hovold compatible: 18dcb93f47SJohan Hovold enum: 19dcb93f47SJohan Hovold - qcom,ipq6018-qmp-pcie-phy 20dcb93f47SJohan Hovold - qcom,ipq8074-qmp-gen3-pcie-phy 21dcb93f47SJohan Hovold - qcom,ipq8074-qmp-pcie-phy 22*29f09daaSdevi priya - qcom,ipq9574-qmp-gen3x1-pcie-phy 23*29f09daaSdevi priya - qcom,ipq9574-qmp-gen3x2-pcie-phy 24dcb93f47SJohan Hovold 25dcb93f47SJohan Hovold reg: 26dcb93f47SJohan Hovold items: 27dcb93f47SJohan Hovold - description: serdes 28dcb93f47SJohan Hovold 29dcb93f47SJohan Hovold clocks: 30505fb254SDmitry Baryshkov maxItems: 3 31dcb93f47SJohan Hovold 32dcb93f47SJohan Hovold clock-names: 33505fb254SDmitry Baryshkov items: 34505fb254SDmitry Baryshkov - const: aux 35505fb254SDmitry Baryshkov - const: cfg_ahb 36505fb254SDmitry Baryshkov - const: pipe 37dcb93f47SJohan Hovold 38dcb93f47SJohan Hovold resets: 39dcb93f47SJohan Hovold maxItems: 2 40dcb93f47SJohan Hovold 41dcb93f47SJohan Hovold reset-names: 42dcb93f47SJohan Hovold items: 43505fb254SDmitry Baryshkov - const: phy 44505fb254SDmitry Baryshkov - const: common 45dcb93f47SJohan Hovold 46dcb93f47SJohan Hovold "#clock-cells": 47dcb93f47SJohan Hovold const: 0 48dcb93f47SJohan Hovold 49dcb93f47SJohan Hovold clock-output-names: 50dcb93f47SJohan Hovold maxItems: 1 51dcb93f47SJohan Hovold 52dcb93f47SJohan Hovold "#phy-cells": 53dcb93f47SJohan Hovold const: 0 54dcb93f47SJohan Hovold 55dcb93f47SJohan Hovoldrequired: 56505fb254SDmitry Baryshkov - compatible 57dcb93f47SJohan Hovold - reg 58dcb93f47SJohan Hovold - clocks 59505fb254SDmitry Baryshkov - clock-names 60505fb254SDmitry Baryshkov - resets 61505fb254SDmitry Baryshkov - reset-names 62dcb93f47SJohan Hovold - "#clock-cells" 63dcb93f47SJohan Hovold - clock-output-names 64dcb93f47SJohan Hovold - "#phy-cells" 65dcb93f47SJohan Hovold 66dcb93f47SJohan HovoldadditionalProperties: false 67dcb93f47SJohan Hovold 68dcb93f47SJohan Hovoldexamples: 69dcb93f47SJohan Hovold - | 70505fb254SDmitry Baryshkov #include <dt-bindings/clock/qcom,gcc-ipq6018.h> 71505fb254SDmitry Baryshkov #include <dt-bindings/reset/qcom,gcc-ipq6018.h> 72dcb93f47SJohan Hovold 73505fb254SDmitry Baryshkov phy@84000 { 74505fb254SDmitry Baryshkov compatible = "qcom,ipq6018-qmp-pcie-phy"; 75211de968SDmitry Baryshkov reg = <0x00084000 0x1000>; 76dcb93f47SJohan Hovold 77505fb254SDmitry Baryshkov clocks = <&gcc GCC_PCIE0_AUX_CLK>, 78505fb254SDmitry Baryshkov <&gcc GCC_PCIE0_AHB_CLK>, 79505fb254SDmitry Baryshkov <&gcc GCC_PCIE0_PIPE_CLK>; 80505fb254SDmitry Baryshkov clock-names = "aux", 81505fb254SDmitry Baryshkov "cfg_ahb", 82505fb254SDmitry Baryshkov "pipe"; 83dcb93f47SJohan Hovold 84505fb254SDmitry Baryshkov clock-output-names = "gcc_pcie0_pipe_clk_src"; 85dcb93f47SJohan Hovold #clock-cells = <0>; 86dcb93f47SJohan Hovold 87dcb93f47SJohan Hovold #phy-cells = <0>; 88505fb254SDmitry Baryshkov 89505fb254SDmitry Baryshkov resets = <&gcc GCC_PCIE0_PHY_BCR>, 90505fb254SDmitry Baryshkov <&gcc GCC_PCIE0PHY_PHY_BCR>; 91505fb254SDmitry Baryshkov reset-names = "phy", 92505fb254SDmitry Baryshkov "common"; 93dcb93f47SJohan Hovold }; 94