xref: /linux/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/phy/qcom,edp-phy.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Qualcomm eDP PHY
9
10maintainers:
11  - Bjorn Andersson <bjorn.andersson@linaro.org>
12
13description:
14  The Qualcomm eDP PHY is found in a number of Qualcomm platform and provides
15  the physical interface for Embedded Display Port.
16
17properties:
18  compatible:
19    enum:
20      - qcom,sc7280-edp-phy
21      - qcom,sc8180x-edp-phy
22      - qcom,sc8280xp-dp-phy
23      - qcom,sc8280xp-edp-phy
24      - qcom,x1e80100-dp-phy
25
26  reg:
27    items:
28      - description: PHY base register block
29      - description: tx0 register block
30      - description: tx1 register block
31      - description: PLL register block
32
33  clocks:
34    maxItems: 2
35
36  clock-names:
37    items:
38      - const: aux
39      - const: cfg_ahb
40
41  "#clock-cells":
42    const: 1
43
44  "#phy-cells":
45    const: 0
46
47  power-domains:
48    maxItems: 1
49
50  vdda-phy-supply: true
51  vdda-pll-supply: true
52
53required:
54  - compatible
55  - reg
56  - clocks
57  - clock-names
58  - "#clock-cells"
59  - "#phy-cells"
60
61additionalProperties: false
62
63examples:
64  - |
65    phy@aec2a00 {
66      compatible = "qcom,sc8180x-edp-phy";
67      reg = <0x0aec2a00 0x1c0>,
68            <0x0aec2200 0xa0>,
69            <0x0aec2600 0xa0>,
70            <0x0aec2000 0x19c>;
71
72      clocks = <&dispcc 0>, <&dispcc 1>;
73      clock-names = "aux", "cfg_ahb";
74
75      #clock-cells = <1>;
76      #phy-cells = <0>;
77
78      vdda-phy-supply = <&vdd_a_edp_0_1p2>;
79      vdda-pll-supply = <&vdd_a_edp_0_0p9>;
80    };
81...
82