1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 3%YAML 1.2 4--- 5$id: http://devicetree.org/schemas/phy/qcom,edp-phy.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: Qualcomm eDP PHY 9 10maintainers: 11 - Bjorn Andersson <bjorn.andersson@linaro.org> 12 13description: 14 The Qualcomm eDP PHY is found in a number of Qualcomm platform and provides 15 the physical interface for Embedded Display Port. 16 17properties: 18 compatible: 19 enum: 20 - qcom,sa8775p-edp-phy 21 - qcom,sc7280-edp-phy 22 - qcom,sc8180x-edp-phy 23 - qcom,sc8280xp-dp-phy 24 - qcom,sc8280xp-edp-phy 25 - qcom,x1e80100-dp-phy 26 27 reg: 28 items: 29 - description: PHY base register block 30 - description: tx0 register block 31 - description: tx1 register block 32 - description: PLL register block 33 34 clocks: 35 maxItems: 2 36 37 clock-names: 38 items: 39 - const: aux 40 - const: cfg_ahb 41 42 "#clock-cells": 43 const: 1 44 45 "#phy-cells": 46 const: 0 47 48 power-domains: 49 maxItems: 1 50 51 vdda-phy-supply: true 52 vdda-pll-supply: true 53 54required: 55 - compatible 56 - reg 57 - clocks 58 - clock-names 59 - "#clock-cells" 60 - "#phy-cells" 61 62additionalProperties: false 63 64examples: 65 - | 66 phy@aec2a00 { 67 compatible = "qcom,sc8180x-edp-phy"; 68 reg = <0x0aec2a00 0x1c0>, 69 <0x0aec2200 0xa0>, 70 <0x0aec2600 0xa0>, 71 <0x0aec2000 0x19c>; 72 73 clocks = <&dispcc 0>, <&dispcc 1>; 74 clock-names = "aux", "cfg_ahb"; 75 76 #clock-cells = <1>; 77 #phy-cells = <0>; 78 79 vdda-phy-supply = <&vdd_a_edp_0_1p2>; 80 vdda-pll-supply = <&vdd_a_edp_0_0p9>; 81 }; 82... 83