1*f94aa7e9SDmitry Baryshkov# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2*f94aa7e9SDmitry Baryshkov%YAML 1.2 3*f94aa7e9SDmitry Baryshkov--- 4*f94aa7e9SDmitry Baryshkov$id: http://devicetree.org/schemas/phy/qcom,dsi-phy-28nm.yaml# 5*f94aa7e9SDmitry Baryshkov$schema: http://devicetree.org/meta-schemas/core.yaml# 6*f94aa7e9SDmitry Baryshkov 7*f94aa7e9SDmitry Baryshkovtitle: Qualcomm Display DSI 28nm PHY 8*f94aa7e9SDmitry Baryshkov 9*f94aa7e9SDmitry Baryshkovmaintainers: 10*f94aa7e9SDmitry Baryshkov - Krishna Manikandan <quic_mkrishn@quicinc.com> 11*f94aa7e9SDmitry Baryshkov 12*f94aa7e9SDmitry BaryshkovallOf: 13*f94aa7e9SDmitry Baryshkov - $ref: qcom,dsi-phy-common.yaml# 14*f94aa7e9SDmitry Baryshkov 15*f94aa7e9SDmitry Baryshkovproperties: 16*f94aa7e9SDmitry Baryshkov compatible: 17*f94aa7e9SDmitry Baryshkov enum: 18*f94aa7e9SDmitry Baryshkov - qcom,dsi-phy-28nm-8226 19*f94aa7e9SDmitry Baryshkov - qcom,dsi-phy-28nm-8937 20*f94aa7e9SDmitry Baryshkov - qcom,dsi-phy-28nm-8960 21*f94aa7e9SDmitry Baryshkov - qcom,dsi-phy-28nm-hpm 22*f94aa7e9SDmitry Baryshkov - qcom,dsi-phy-28nm-hpm-fam-b 23*f94aa7e9SDmitry Baryshkov - qcom,dsi-phy-28nm-lp 24*f94aa7e9SDmitry Baryshkov 25*f94aa7e9SDmitry Baryshkov reg: 26*f94aa7e9SDmitry Baryshkov items: 27*f94aa7e9SDmitry Baryshkov - description: dsi pll register set 28*f94aa7e9SDmitry Baryshkov - description: dsi phy register set 29*f94aa7e9SDmitry Baryshkov - description: dsi phy regulator register set 30*f94aa7e9SDmitry Baryshkov 31*f94aa7e9SDmitry Baryshkov reg-names: 32*f94aa7e9SDmitry Baryshkov items: 33*f94aa7e9SDmitry Baryshkov - const: dsi_pll 34*f94aa7e9SDmitry Baryshkov - const: dsi_phy 35*f94aa7e9SDmitry Baryshkov - const: dsi_phy_regulator 36*f94aa7e9SDmitry Baryshkov 37*f94aa7e9SDmitry Baryshkov vddio-supply: 38*f94aa7e9SDmitry Baryshkov description: Phandle to vdd-io regulator device node. 39*f94aa7e9SDmitry Baryshkov 40*f94aa7e9SDmitry Baryshkov qcom,dsi-phy-regulator-ldo-mode: 41*f94aa7e9SDmitry Baryshkov type: boolean 42*f94aa7e9SDmitry Baryshkov description: Indicates if the LDO mode PHY regulator is wanted. 43*f94aa7e9SDmitry Baryshkov 44*f94aa7e9SDmitry Baryshkovrequired: 45*f94aa7e9SDmitry Baryshkov - compatible 46*f94aa7e9SDmitry Baryshkov - reg 47*f94aa7e9SDmitry Baryshkov - reg-names 48*f94aa7e9SDmitry Baryshkov - vddio-supply 49*f94aa7e9SDmitry Baryshkov 50*f94aa7e9SDmitry BaryshkovunevaluatedProperties: false 51*f94aa7e9SDmitry Baryshkov 52*f94aa7e9SDmitry Baryshkovexamples: 53*f94aa7e9SDmitry Baryshkov - | 54*f94aa7e9SDmitry Baryshkov #include <dt-bindings/clock/qcom,dispcc-sdm845.h> 55*f94aa7e9SDmitry Baryshkov #include <dt-bindings/clock/qcom,rpmh.h> 56*f94aa7e9SDmitry Baryshkov 57*f94aa7e9SDmitry Baryshkov dsi-phy@fd922a00 { 58*f94aa7e9SDmitry Baryshkov compatible = "qcom,dsi-phy-28nm-lp"; 59*f94aa7e9SDmitry Baryshkov reg = <0xfd922a00 0xd4>, 60*f94aa7e9SDmitry Baryshkov <0xfd922b00 0x2b0>, 61*f94aa7e9SDmitry Baryshkov <0xfd922d80 0x7b>; 62*f94aa7e9SDmitry Baryshkov reg-names = "dsi_pll", 63*f94aa7e9SDmitry Baryshkov "dsi_phy", 64*f94aa7e9SDmitry Baryshkov "dsi_phy_regulator"; 65*f94aa7e9SDmitry Baryshkov 66*f94aa7e9SDmitry Baryshkov #clock-cells = <1>; 67*f94aa7e9SDmitry Baryshkov #phy-cells = <0>; 68*f94aa7e9SDmitry Baryshkov 69*f94aa7e9SDmitry Baryshkov vddio-supply = <&vddio_reg>; 70*f94aa7e9SDmitry Baryshkov 71*f94aa7e9SDmitry Baryshkov clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 72*f94aa7e9SDmitry Baryshkov <&rpmhcc RPMH_CXO_CLK>; 73*f94aa7e9SDmitry Baryshkov clock-names = "iface", "ref"; 74*f94aa7e9SDmitry Baryshkov }; 75*f94aa7e9SDmitry Baryshkov... 76