xref: /linux/Documentation/devicetree/bindings/phy/qcom,dsi-phy-14nm.yaml (revision 0fc8f6200d2313278fbf4539bbab74677c685531)

# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/qcom,dsi-phy-14nm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm Display DSI 14nm PHY

maintainers:
  - Krishna Manikandan <quic_mkrishn@quicinc.com>

allOf:
  - $ref: qcom,dsi-phy-common.yaml#

properties:
  compatible:
    enum:
      - qcom,dsi-phy-14nm
      - qcom,dsi-phy-14nm-2290
      - qcom,dsi-phy-14nm-660
      - qcom,dsi-phy-14nm-8953
      - qcom,sm6125-dsi-phy-14nm
      - qcom,sm6150-dsi-phy-14nm

  reg:
    items:
      - description: dsi phy register set
      - description: dsi phy lane register set
      - description: dsi pll register set

  reg-names:
    items:
      - const: dsi_phy
      - const: dsi_phy_lane
      - const: dsi_pll

  vcca-supply:
    description: Phandle to vcca regulator device node.

  power-domains:
    description:
      A phandle and PM domain specifier for an optional power domain.
    maxItems: 1

  required-opps:
    description:
      A phandle to an OPP node describing the power domain's performance point.
    maxItems: 1

required:
  - compatible
  - reg
  - reg-names

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
    #include <dt-bindings/clock/qcom,rpmh.h>

    dsi-phy@ae94400 {
        compatible = "qcom,dsi-phy-14nm";
        reg = <0x0ae94400 0x200>,
              <0x0ae94600 0x280>,
              <0x0ae94a00 0x1e0>;
        reg-names = "dsi_phy",
                    "dsi_phy_lane",
                    "dsi_pll";

        #clock-cells = <1>;
        #phy-cells = <0>;

        vcca-supply = <&vcca_reg>;
        clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
                 <&rpmhcc RPMH_CXO_CLK>;
        clock-names = "iface", "ref";
    };
...