1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm QMP PHY controller (USB, SC8280XP) 8 9maintainers: 10 - Vinod Koul <vkoul@kernel.org> 11 12description: 13 The QMP PHY controller supports physical layer functionality for a number of 14 controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB. 15 16properties: 17 compatible: 18 enum: 19 - qcom,ipq6018-qmp-usb3-phy 20 - qcom,ipq8074-qmp-usb3-phy 21 - qcom,ipq9574-qmp-usb3-phy 22 - qcom,msm8996-qmp-usb3-phy 23 - qcom,msm8998-qmp-usb3-phy 24 - qcom,qcm2290-qmp-usb3-phy 25 - qcom,sa8775p-qmp-usb3-uni-phy 26 - qcom,sc8280xp-qmp-usb3-uni-phy 27 - qcom,sdm845-qmp-usb3-uni-phy 28 - qcom,sdx55-qmp-usb3-uni-phy 29 - qcom,sdx65-qmp-usb3-uni-phy 30 - qcom,sm6115-qmp-usb3-phy 31 - qcom,sm8150-qmp-usb3-uni-phy 32 - qcom,sm8250-qmp-usb3-uni-phy 33 - qcom,sm8350-qmp-usb3-uni-phy 34 35 36 reg: 37 maxItems: 1 38 39 clocks: 40 minItems: 4 41 maxItems: 5 42 43 clock-names: 44 minItems: 4 45 maxItems: 5 46 47 power-domains: 48 maxItems: 1 49 50 resets: 51 maxItems: 2 52 53 reset-names: 54 items: 55 - const: phy 56 - const: phy_phy 57 58 vdda-phy-supply: true 59 60 vdda-pll-supply: true 61 62 "#clock-cells": 63 const: 0 64 65 clock-output-names: 66 maxItems: 1 67 68 "#phy-cells": 69 const: 0 70 71required: 72 - compatible 73 - reg 74 - clocks 75 - clock-names 76 - resets 77 - reset-names 78 - vdda-phy-supply 79 - vdda-pll-supply 80 - "#clock-cells" 81 - clock-output-names 82 - "#phy-cells" 83 84allOf: 85 - if: 86 properties: 87 compatible: 88 contains: 89 enum: 90 - qcom,ipq6018-qmp-usb3-phy 91 - qcom,ipq8074-qmp-usb3-phy 92 - qcom,ipq9574-qmp-usb3-phy 93 - qcom,msm8996-qmp-usb3-phy 94 - qcom,msm8998-qmp-usb3-phy 95 - qcom,sdx55-qmp-usb3-uni-phy 96 - qcom,sdx65-qmp-usb3-uni-phy 97 then: 98 properties: 99 clocks: 100 maxItems: 4 101 clock-names: 102 items: 103 - const: aux 104 - const: ref 105 - const: cfg_ahb 106 - const: pipe 107 108 - if: 109 properties: 110 compatible: 111 contains: 112 enum: 113 - qcom,qcm2290-qmp-usb3-phy 114 - qcom,sm6115-qmp-usb3-phy 115 then: 116 properties: 117 clocks: 118 maxItems: 4 119 clock-names: 120 items: 121 - const: cfg_ahb 122 - const: ref 123 - const: com_aux 124 - const: pipe 125 126 - if: 127 properties: 128 compatible: 129 contains: 130 enum: 131 - qcom,sa8775p-qmp-usb3-uni-phy 132 - qcom,sc8280xp-qmp-usb3-uni-phy 133 - qcom,sm8150-qmp-usb3-uni-phy 134 - qcom,sm8250-qmp-usb3-uni-phy 135 - qcom,sm8350-qmp-usb3-uni-phy 136 then: 137 properties: 138 clocks: 139 maxItems: 4 140 clock-names: 141 items: 142 - const: aux 143 - const: ref 144 - const: com_aux 145 - const: pipe 146 147 - if: 148 properties: 149 compatible: 150 contains: 151 enum: 152 - qcom,sdm845-qmp-usb3-uni-phy 153 then: 154 properties: 155 clocks: 156 maxItems: 5 157 clock-names: 158 items: 159 - const: aux 160 - const: cfg_ahb 161 - const: ref 162 - const: com_aux 163 - const: pipe 164 165 - if: 166 properties: 167 compatible: 168 contains: 169 enum: 170 - qcom,sa8775p-qmp-usb3-uni-phy 171 - qcom,sc8280xp-qmp-usb3-uni-phy 172 then: 173 required: 174 - power-domains 175 176additionalProperties: false 177 178examples: 179 - | 180 #include <dt-bindings/clock/qcom,gcc-sc8280xp.h> 181 #include <dt-bindings/clock/qcom,rpmh.h> 182 183 phy@88ef000 { 184 compatible = "qcom,sc8280xp-qmp-usb3-uni-phy"; 185 reg = <0x088ef000 0x2000>; 186 187 clocks = <&gcc GCC_USB3_MP_PHY_AUX_CLK>, 188 <&gcc GCC_USB3_MP0_CLKREF_CLK>, 189 <&gcc GCC_USB3_MP_PHY_COM_AUX_CLK>, 190 <&gcc GCC_USB3_MP_PHY_PIPE_0_CLK>; 191 clock-names = "aux", "ref", "com_aux", "pipe"; 192 193 power-domains = <&gcc USB30_MP_GDSC>; 194 195 resets = <&gcc GCC_USB3_UNIPHY_MP0_BCR>, 196 <&gcc GCC_USB3UNIPHY_PHY_MP0_BCR>; 197 reset-names = "phy", "phy_phy"; 198 199 vdda-phy-supply = <&vreg_l3a>; 200 vdda-pll-supply = <&vreg_l5a>; 201 202 #clock-cells = <0>; 203 clock-output-names = "usb2_phy0_pipe_clk"; 204 205 #phy-cells = <0>; 206 }; 207