xref: /linux/Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-hsphy.yaml (revision a23e1966932464e1c5226cb9ac4ce1d5fc10ba22) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/qcom,ipq5332-usb-hsphy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: M31 USB PHY
8
9maintainers:
10  - Sricharan Ramabadhran <quic_srichara@quicinc.com>
11  - Varadarajan Narayanan <quic_varada@quicinc.com>
12
13description:
14  USB M31 PHY (https://www.m31tech.com) found in Qualcomm
15  IPQ5018, IPQ5332 SoCs.
16
17properties:
18  compatible:
19    items:
20      - enum:
21          - qcom,ipq5018-usb-hsphy
22          - qcom,ipq5332-usb-hsphy
23
24  "#phy-cells":
25    const: 0
26
27  reg:
28    maxItems: 1
29
30  clocks:
31    maxItems: 1
32
33  clock-names:
34    items:
35      - const: cfg_ahb
36
37  resets:
38    maxItems: 1
39
40  vdd-supply:
41    description:
42      Phandle to 5V regulator supply to PHY digital circuit.
43
44additionalProperties: false
45
46examples:
47  - |
48    #include <dt-bindings/clock/qcom,ipq5332-gcc.h>
49    usb-phy@7b000 {
50        compatible = "qcom,ipq5332-usb-hsphy";
51        reg = <0x0007b000 0x12c>;
52
53        clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>;
54        clock-names = "cfg_ahb";
55
56        #phy-cells = <0>;
57
58        resets = <&gcc GCC_QUSB2_0_PHY_BCR>;
59
60        vdd-supply = <&regulator_fixed_5p0>;
61    };
62