xref: /linux/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml (revision 26fbb4c8c7c3ee9a4c3b4de555a8587b5a19154e) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: "http://devicetree.org/schemas/phy/phy-cadence-torrent.yaml#"
5$schema: "http://devicetree.org/meta-schemas/core.yaml#"
6
7title: Cadence Torrent SD0801 PHY binding
8
9description:
10  This binding describes the Cadence SD0801 PHY (also known as Torrent PHY)
11  hardware included with the Cadence MHDP DisplayPort controller. Torrent
12  PHY also supports multilink multiprotocol combinations including protocols
13  such as PCIe, USB, SGMII, QSGMII etc.
14
15maintainers:
16  - Swapnil Jakhade <sjakhade@cadence.com>
17  - Yuti Amonkar <yamonkar@cadence.com>
18
19properties:
20  compatible:
21    enum:
22      - cdns,torrent-phy
23      - ti,j721e-serdes-10g
24
25  '#address-cells':
26    const: 1
27
28  '#size-cells':
29    const: 0
30
31  clocks:
32    maxItems: 1
33    description:
34      PHY reference clock. Must contain an entry in clock-names.
35
36  clock-names:
37    const: refclk
38
39  reg:
40    minItems: 1
41    maxItems: 2
42    items:
43      - description: Offset of the Torrent PHY configuration registers.
44      - description: Offset of the DPTX PHY configuration registers.
45
46  reg-names:
47    minItems: 1
48    maxItems: 2
49    items:
50      - const: torrent_phy
51      - const: dptx_phy
52
53  resets:
54    minItems: 1
55    maxItems: 2
56    items:
57      - description: Torrent PHY reset.
58      - description: Torrent APB reset. This is optional.
59
60  reset-names:
61    minItems: 1
62    maxItems: 2
63    items:
64      - const: torrent_reset
65      - const: torrent_apb
66
67patternProperties:
68  '^phy@[0-3]$':
69    type: object
70    description:
71      Each group of PHY lanes with a single master lane should be represented as a sub-node.
72    properties:
73      reg:
74        description:
75          The master lane number. This is the lowest numbered lane in the lane group.
76        minimum: 0
77        maximum: 3
78
79      resets:
80        minItems: 1
81        maxItems: 4
82        description:
83          Contains list of resets, one per lane, to get all the link lanes out of reset.
84
85      "#phy-cells":
86        const: 0
87
88      cdns,phy-type:
89        description:
90          Specifies the type of PHY for which the group of PHY lanes is used.
91          Refer include/dt-bindings/phy/phy.h. Constants from the header should be used.
92        $ref: /schemas/types.yaml#/definitions/uint32
93        minimum: 1
94        maximum: 9
95
96      cdns,num-lanes:
97        description:
98          Number of lanes.
99        $ref: /schemas/types.yaml#/definitions/uint32
100        enum: [1, 2, 3, 4]
101        default: 4
102
103      cdns,ssc-mode:
104        description:
105          Specifies the Spread Spectrum Clocking mode used. It can be NO_SSC,
106          EXTERNAL_SSC or INTERNAL_SSC.
107          Refer include/dt-bindings/phy/phy-cadence-torrent.h for the constants to be used.
108        $ref: /schemas/types.yaml#/definitions/uint32
109        enum: [0, 1, 2]
110        default: 0
111
112      cdns,max-bit-rate:
113        description:
114          Maximum DisplayPort link bit rate to use, in Mbps
115        $ref: /schemas/types.yaml#/definitions/uint32
116        enum: [2160, 2430, 2700, 3240, 4320, 5400, 8100]
117        default: 8100
118
119    required:
120      - reg
121      - resets
122      - "#phy-cells"
123      - cdns,phy-type
124      - cdns,num-lanes
125
126    additionalProperties: false
127
128required:
129  - compatible
130  - "#address-cells"
131  - "#size-cells"
132  - clocks
133  - clock-names
134  - reg
135  - reg-names
136  - resets
137  - reset-names
138
139additionalProperties: false
140
141examples:
142  - |
143    #include <dt-bindings/phy/phy.h>
144
145    bus {
146        #address-cells = <2>;
147        #size-cells = <2>;
148
149        torrent-phy@f0fb500000 {
150            compatible = "cdns,torrent-phy";
151            reg = <0xf0 0xfb500000 0x0 0x00100000>,
152                  <0xf0 0xfb030a00 0x0 0x00000040>;
153            reg-names = "torrent_phy", "dptx_phy";
154            resets = <&phyrst 0>;
155            reset-names = "torrent_reset";
156            clocks = <&ref_clk>;
157            clock-names = "refclk";
158            #address-cells = <1>;
159            #size-cells = <0>;
160            phy@0 {
161                reg = <0>;
162                resets = <&phyrst 1>, <&phyrst 2>,
163                         <&phyrst 3>, <&phyrst 4>;
164                #phy-cells = <0>;
165                cdns,phy-type = <PHY_TYPE_DP>;
166                cdns,num-lanes = <4>;
167                cdns,max-bit-rate = <8100>;
168            };
169        };
170    };
171  - |
172    #include <dt-bindings/phy/phy.h>
173    #include <dt-bindings/phy/phy-cadence-torrent.h>
174
175    bus {
176        #address-cells = <2>;
177        #size-cells = <2>;
178
179        torrent-phy@f0fb500000 {
180            compatible = "cdns,torrent-phy";
181            reg = <0xf0 0xfb500000 0x0 0x00100000>;
182            reg-names = "torrent_phy";
183            resets = <&phyrst 0>, <&phyrst 1>;
184            reset-names = "torrent_reset", "torrent_apb";
185            clocks = <&ref_clk>;
186            clock-names = "refclk";
187            #address-cells = <1>;
188            #size-cells = <0>;
189            phy@0 {
190                reg = <0>;
191                resets = <&phyrst 2>, <&phyrst 3>;
192                #phy-cells = <0>;
193                cdns,phy-type = <PHY_TYPE_PCIE>;
194                cdns,num-lanes = <2>;
195                cdns,ssc-mode = <TORRENT_SERDES_NO_SSC>;
196            };
197
198            phy@2 {
199                reg = <2>;
200                resets = <&phyrst 4>;
201                #phy-cells = <0>;
202                cdns,phy-type = <PHY_TYPE_SGMII>;
203                cdns,num-lanes = <1>;
204                cdns,ssc-mode = <TORRENT_SERDES_NO_SSC>;
205            };
206        };
207    };
208...
209