xref: /linux/Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml (revision d30c1683aaecb93d2ab95685dc4300a33d3cea7a) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (c) 2020 MediaTek
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/phy/mediatek,ufs-phy.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: MediaTek Universal Flash Storage (UFS) M-PHY
9
10maintainers:
11  - Chunfeng Yun <chunfeng.yun@mediatek.com>
12  - Peter Wang <peter.wang@mediatek.com>
13  - Chaotian Jing <chaotian.jing@mediatek.com>
14
15description: |
16  UFS M-PHY nodes are defined to describe on-chip UFS M-PHY hardware macro.
17  Each UFS M-PHY node should have its own node.
18  To bind UFS M-PHY with UFS host controller, the controller node should
19  contain a phandle reference to UFS M-PHY node.
20
21properties:
22  $nodename:
23    pattern: "^ufs-phy@[0-9a-f]+$"
24
25  compatible:
26    oneOf:
27      - items:
28          - enum:
29              - mediatek,mt8195-ufsphy
30          - const: mediatek,mt8183-ufsphy
31      - const: mediatek,mt8183-ufsphy
32
33  reg:
34    maxItems: 1
35
36  clocks:
37    items:
38      - description: Unipro core control clock.
39      - description: M-PHY core control clock.
40
41  clock-names:
42    items:
43      - const: unipro
44      - const: mp
45
46  "#phy-cells":
47    const: 0
48
49required:
50  - compatible
51  - reg
52  - "#phy-cells"
53  - clocks
54  - clock-names
55
56additionalProperties: false
57
58examples:
59  - |
60    #include <dt-bindings/clock/mt8183-clk.h>
61    ufsphy: ufs-phy@11fa0000 {
62        compatible = "mediatek,mt8183-ufsphy";
63        reg = <0x11fa0000 0xc000>;
64        clocks = <&infracfg CLK_INFRA_UNIPRO_SCK>,
65                 <&infracfg CLK_INFRA_UFS_MP_SAP_BCLK>;
66        clock-names = "unipro", "mp";
67        #phy-cells = <0>;
68    };
69
70...
71