xref: /linux/Documentation/devicetree/bindings/phy/marvell,comphy-cp110.yaml (revision 6f17ab9a63e670bd62a287f95e3982f99eafd77e) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/marvell,comphy-cp110.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Marvell MVEBU COMPHY Controller
8
9maintainers:
10  - Miquel Raynal <miquel.raynal@bootlin.com>
11
12description: >
13  COMPHY controllers can be found on the following Marvell MVEBU SoCs:
14
15    * Armada 7k/8k (on the CP110)
16    * Armada 3700
17
18  It provides a number of shared PHYs used by various interfaces (network, SATA,
19  USB, PCIe...).
20
21properties:
22  compatible:
23    enum:
24      - marvell,comphy-cp110
25      - marvell,comphy-a3700
26
27  reg:
28    minItems: 1
29    items:
30      - description: Generic COMPHY registers
31      - description: Lane 1 (PCIe/GbE) registers (Armada 3700)
32      - description: Lane 0 (USB3/GbE) registers (Armada 3700)
33      - description: Lane 2 (SATA/USB3) registers (Armada 3700)
34
35  reg-names:
36    minItems: 1
37    items:
38      - const: comphy
39      - const: lane1_pcie_gbe
40      - const: lane0_usb3_gbe
41      - const: lane2_sata_usb3
42
43  '#address-cells':
44    const: 1
45
46  '#size-cells':
47    const: 0
48
49  clocks:
50    minItems: 1
51    maxItems: 3
52
53  clock-names:
54    minItems: 1
55    maxItems: 3
56
57  marvell,system-controller:
58    description: Phandle to the Marvell system controller (CP110 only)
59    $ref: /schemas/types.yaml#/definitions/phandle
60
61patternProperties:
62  '^phy@[0-5]$':
63    description: A COMPHY lane child node
64    type: object
65    additionalProperties: false
66
67    properties:
68      reg:
69        description: COMPHY lane number
70        maximum: 5
71
72      '#phy-cells':
73        const: 1
74
75      connector:
76        type: object
77
78    required:
79      - reg
80      - '#phy-cells'
81
82required:
83  - compatible
84  - reg
85
86additionalProperties: false
87
88allOf:
89  - if:
90      properties:
91        compatible:
92          const: marvell,comphy-a3700
93
94    then:
95      properties:
96        clocks:
97          maxItems: 1
98        clock-names:
99          const: xtal
100
101      required:
102        - reg-names
103
104    else:
105      properties:
106        clocks:
107          minItems: 3
108        clock-names:
109          items:
110            - const: mg_clk
111            - const: mg_core_clk
112            - const: axi_clk
113
114      required:
115        - marvell,system-controller
116
117examples:
118  - |
119    phy@120000 {
120        compatible = "marvell,comphy-cp110";
121        reg = <0x120000 0x6000>;
122        clocks = <&clk 1 5>, <&clk 1 6>, <&clk 1 18>;
123        clock-names = "mg_clk", "mg_core_clk", "axi_clk";
124        #address-cells = <1>;
125        #size-cells = <0>;
126        marvell,system-controller = <&syscon0>;
127
128        phy@0 {
129            reg = <0>;
130            #phy-cells = <1>;
131        };
132
133        phy@1 {
134            reg = <1>;
135            #phy-cells = <1>;
136        };
137    };
138
139  - |
140    phy@18300 {
141        compatible = "marvell,comphy-a3700";
142        reg = <0x18300 0x300>,
143              <0x1F000 0x400>,
144              <0x5C000 0x400>,
145              <0xe0178 0x8>;
146        reg-names = "comphy",
147                    "lane1_pcie_gbe",
148                    "lane0_usb3_gbe",
149                    "lane2_sata_usb3";
150        #address-cells = <1>;
151        #size-cells = <0>;
152
153        comphy0: phy@0 {
154            reg = <0>;
155            #phy-cells = <1>;
156        };
157
158        comphy1: phy@1 {
159            reg = <1>;
160            #phy-cells = <1>;
161        };
162
163        comphy2: phy@2 {
164            reg = <2>;
165            #phy-cells = <1>;
166        };
167    };
168