xref: /linux/Documentation/devicetree/bindings/phy/marvell,comphy-cp110.yaml (revision 8582976acc8504cec53a7b6fed493435eba8437f)
1*50355ac7SRob Herring (Arm)# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*50355ac7SRob Herring (Arm)%YAML 1.2
3*50355ac7SRob Herring (Arm)---
4*50355ac7SRob Herring (Arm)$id: http://devicetree.org/schemas/phy/marvell,comphy-cp110.yaml#
5*50355ac7SRob Herring (Arm)$schema: http://devicetree.org/meta-schemas/core.yaml#
6*50355ac7SRob Herring (Arm)
7*50355ac7SRob Herring (Arm)title: Marvell MVEBU COMPHY Controller
8*50355ac7SRob Herring (Arm)
9*50355ac7SRob Herring (Arm)maintainers:
10*50355ac7SRob Herring (Arm)  - Miquel Raynal <miquel.raynal@bootlin.com>
11*50355ac7SRob Herring (Arm)
12*50355ac7SRob Herring (Arm)description: >
13*50355ac7SRob Herring (Arm)  COMPHY controllers can be found on the following Marvell MVEBU SoCs:
14*50355ac7SRob Herring (Arm)
15*50355ac7SRob Herring (Arm)    * Armada 7k/8k (on the CP110)
16*50355ac7SRob Herring (Arm)    * Armada 3700
17*50355ac7SRob Herring (Arm)
18*50355ac7SRob Herring (Arm)  It provides a number of shared PHYs used by various interfaces (network, SATA,
19*50355ac7SRob Herring (Arm)  USB, PCIe...).
20*50355ac7SRob Herring (Arm)
21*50355ac7SRob Herring (Arm)properties:
22*50355ac7SRob Herring (Arm)  compatible:
23*50355ac7SRob Herring (Arm)    enum:
24*50355ac7SRob Herring (Arm)      - marvell,comphy-cp110
25*50355ac7SRob Herring (Arm)      - marvell,comphy-a3700
26*50355ac7SRob Herring (Arm)
27*50355ac7SRob Herring (Arm)  reg:
28*50355ac7SRob Herring (Arm)    minItems: 1
29*50355ac7SRob Herring (Arm)    items:
30*50355ac7SRob Herring (Arm)      - description: Generic COMPHY registers
31*50355ac7SRob Herring (Arm)      - description: Lane 1 (PCIe/GbE) registers (Armada 3700)
32*50355ac7SRob Herring (Arm)      - description: Lane 0 (USB3/GbE) registers (Armada 3700)
33*50355ac7SRob Herring (Arm)      - description: Lane 2 (SATA/USB3) registers (Armada 3700)
34*50355ac7SRob Herring (Arm)
35*50355ac7SRob Herring (Arm)  reg-names:
36*50355ac7SRob Herring (Arm)    minItems: 1
37*50355ac7SRob Herring (Arm)    items:
38*50355ac7SRob Herring (Arm)      - const: comphy
39*50355ac7SRob Herring (Arm)      - const: lane1_pcie_gbe
40*50355ac7SRob Herring (Arm)      - const: lane0_usb3_gbe
41*50355ac7SRob Herring (Arm)      - const: lane2_sata_usb3
42*50355ac7SRob Herring (Arm)
43*50355ac7SRob Herring (Arm)  '#address-cells':
44*50355ac7SRob Herring (Arm)    const: 1
45*50355ac7SRob Herring (Arm)
46*50355ac7SRob Herring (Arm)  '#size-cells':
47*50355ac7SRob Herring (Arm)    const: 0
48*50355ac7SRob Herring (Arm)
49*50355ac7SRob Herring (Arm)  clocks:
50*50355ac7SRob Herring (Arm)    maxItems: 3
51*50355ac7SRob Herring (Arm)    description: Reference clocks for CP110; MG clock, MG Core clock, AXI clock
52*50355ac7SRob Herring (Arm)
53*50355ac7SRob Herring (Arm)  clock-names:
54*50355ac7SRob Herring (Arm)    items:
55*50355ac7SRob Herring (Arm)      - const: mg_clk
56*50355ac7SRob Herring (Arm)      - const: mg_core_clk
57*50355ac7SRob Herring (Arm)      - const: axi_clk
58*50355ac7SRob Herring (Arm)
59*50355ac7SRob Herring (Arm)  marvell,system-controller:
60*50355ac7SRob Herring (Arm)    description: Phandle to the Marvell system controller (CP110 only)
61*50355ac7SRob Herring (Arm)    $ref: /schemas/types.yaml#/definitions/phandle
62*50355ac7SRob Herring (Arm)
63*50355ac7SRob Herring (Arm)patternProperties:
64*50355ac7SRob Herring (Arm)  '^phy@[0-2]$':
65*50355ac7SRob Herring (Arm)    description: A COMPHY lane child node
66*50355ac7SRob Herring (Arm)    type: object
67*50355ac7SRob Herring (Arm)    additionalProperties: false
68*50355ac7SRob Herring (Arm)
69*50355ac7SRob Herring (Arm)    properties:
70*50355ac7SRob Herring (Arm)      reg:
71*50355ac7SRob Herring (Arm)        description: COMPHY lane number
72*50355ac7SRob Herring (Arm)
73*50355ac7SRob Herring (Arm)      '#phy-cells':
74*50355ac7SRob Herring (Arm)        const: 1
75*50355ac7SRob Herring (Arm)
76*50355ac7SRob Herring (Arm)    required:
77*50355ac7SRob Herring (Arm)      - reg
78*50355ac7SRob Herring (Arm)      - '#phy-cells'
79*50355ac7SRob Herring (Arm)
80*50355ac7SRob Herring (Arm)required:
81*50355ac7SRob Herring (Arm)  - compatible
82*50355ac7SRob Herring (Arm)  - reg
83*50355ac7SRob Herring (Arm)
84*50355ac7SRob Herring (Arm)additionalProperties: false
85*50355ac7SRob Herring (Arm)
86*50355ac7SRob Herring (Arm)allOf:
87*50355ac7SRob Herring (Arm)  - if:
88*50355ac7SRob Herring (Arm)      properties:
89*50355ac7SRob Herring (Arm)        compatible:
90*50355ac7SRob Herring (Arm)          const: marvell,comphy-a3700
91*50355ac7SRob Herring (Arm)
92*50355ac7SRob Herring (Arm)    then:
93*50355ac7SRob Herring (Arm)      properties:
94*50355ac7SRob Herring (Arm)        clocks: false
95*50355ac7SRob Herring (Arm)        clock-names: false
96*50355ac7SRob Herring (Arm)
97*50355ac7SRob Herring (Arm)      required:
98*50355ac7SRob Herring (Arm)        - reg-names
99*50355ac7SRob Herring (Arm)
100*50355ac7SRob Herring (Arm)    else:
101*50355ac7SRob Herring (Arm)      required:
102*50355ac7SRob Herring (Arm)        - marvell,system-controller
103*50355ac7SRob Herring (Arm)
104*50355ac7SRob Herring (Arm)examples:
105*50355ac7SRob Herring (Arm)  - |
106*50355ac7SRob Herring (Arm)    phy@120000 {
107*50355ac7SRob Herring (Arm)        compatible = "marvell,comphy-cp110";
108*50355ac7SRob Herring (Arm)        reg = <0x120000 0x6000>;
109*50355ac7SRob Herring (Arm)        clocks = <&clk 1 5>, <&clk 1 6>, <&clk 1 18>;
110*50355ac7SRob Herring (Arm)        clock-names = "mg_clk", "mg_core_clk", "axi_clk";
111*50355ac7SRob Herring (Arm)        #address-cells = <1>;
112*50355ac7SRob Herring (Arm)        #size-cells = <0>;
113*50355ac7SRob Herring (Arm)        marvell,system-controller = <&syscon0>;
114*50355ac7SRob Herring (Arm)
115*50355ac7SRob Herring (Arm)        phy@0 {
116*50355ac7SRob Herring (Arm)            reg = <0>;
117*50355ac7SRob Herring (Arm)            #phy-cells = <1>;
118*50355ac7SRob Herring (Arm)        };
119*50355ac7SRob Herring (Arm)
120*50355ac7SRob Herring (Arm)        phy@1 {
121*50355ac7SRob Herring (Arm)            reg = <1>;
122*50355ac7SRob Herring (Arm)            #phy-cells = <1>;
123*50355ac7SRob Herring (Arm)        };
124*50355ac7SRob Herring (Arm)    };
125*50355ac7SRob Herring (Arm)
126*50355ac7SRob Herring (Arm)  - |
127*50355ac7SRob Herring (Arm)    phy@18300 {
128*50355ac7SRob Herring (Arm)        compatible = "marvell,comphy-a3700";
129*50355ac7SRob Herring (Arm)        reg = <0x18300 0x300>,
130*50355ac7SRob Herring (Arm)              <0x1F000 0x400>,
131*50355ac7SRob Herring (Arm)              <0x5C000 0x400>,
132*50355ac7SRob Herring (Arm)              <0xe0178 0x8>;
133*50355ac7SRob Herring (Arm)        reg-names = "comphy",
134*50355ac7SRob Herring (Arm)                    "lane1_pcie_gbe",
135*50355ac7SRob Herring (Arm)                    "lane0_usb3_gbe",
136*50355ac7SRob Herring (Arm)                    "lane2_sata_usb3";
137*50355ac7SRob Herring (Arm)        #address-cells = <1>;
138*50355ac7SRob Herring (Arm)        #size-cells = <0>;
139*50355ac7SRob Herring (Arm)
140*50355ac7SRob Herring (Arm)        comphy0: phy@0 {
141*50355ac7SRob Herring (Arm)            reg = <0>;
142*50355ac7SRob Herring (Arm)            #phy-cells = <1>;
143*50355ac7SRob Herring (Arm)        };
144*50355ac7SRob Herring (Arm)
145*50355ac7SRob Herring (Arm)        comphy1: phy@1 {
146*50355ac7SRob Herring (Arm)            reg = <1>;
147*50355ac7SRob Herring (Arm)            #phy-cells = <1>;
148*50355ac7SRob Herring (Arm)        };
149*50355ac7SRob Herring (Arm)
150*50355ac7SRob Herring (Arm)        comphy2: phy@2 {
151*50355ac7SRob Herring (Arm)            reg = <2>;
152*50355ac7SRob Herring (Arm)            #phy-cells = <1>;
153*50355ac7SRob Herring (Arm)        };
154*50355ac7SRob Herring (Arm)    };
155