15bc99910SRamuthevar Vadivel Murugan# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 25bc99910SRamuthevar Vadivel Murugan%YAML 1.2 35bc99910SRamuthevar Vadivel Murugan--- 45bc99910SRamuthevar Vadivel Murugan$id: http://devicetree.org/schemas/phy/intel,lgm-emmc-phy.yaml# 55bc99910SRamuthevar Vadivel Murugan$schema: http://devicetree.org/meta-schemas/core.yaml# 65bc99910SRamuthevar Vadivel Murugan 75bc99910SRamuthevar Vadivel Murugantitle: Intel Lightning Mountain(LGM) eMMC PHY Device Tree Bindings 85bc99910SRamuthevar Vadivel Murugan 95bc99910SRamuthevar Vadivel Muruganmaintainers: 105bc99910SRamuthevar Vadivel Murugan - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> 115bc99910SRamuthevar Vadivel Murugan 125bc99910SRamuthevar Vadivel Murugandescription: |+ 135bc99910SRamuthevar Vadivel Murugan Bindings for eMMC PHY on Intel's Lightning Mountain SoC, syscon 145bc99910SRamuthevar Vadivel Murugan node is used to reference the base address of eMMC phy registers. 155bc99910SRamuthevar Vadivel Murugan 165bc99910SRamuthevar Vadivel Murugan The eMMC PHY node should be the child of a syscon node with the 175bc99910SRamuthevar Vadivel Murugan required property: 185bc99910SRamuthevar Vadivel Murugan 195bc99910SRamuthevar Vadivel Murugan - compatible: Should be one of the following: 205bc99910SRamuthevar Vadivel Murugan "intel,lgm-syscon", "syscon" 215bc99910SRamuthevar Vadivel Murugan - reg: 225bc99910SRamuthevar Vadivel Murugan maxItems: 1 235bc99910SRamuthevar Vadivel Murugan 245bc99910SRamuthevar Vadivel Muruganproperties: 255bc99910SRamuthevar Vadivel Murugan compatible: 26*9580b22aSWan Ahmad Zainie oneOf: 27*9580b22aSWan Ahmad Zainie - const: intel,lgm-emmc-phy 28*9580b22aSWan Ahmad Zainie - const: intel,keembay-emmc-phy 295bc99910SRamuthevar Vadivel Murugan 305bc99910SRamuthevar Vadivel Murugan "#phy-cells": 315bc99910SRamuthevar Vadivel Murugan const: 0 325bc99910SRamuthevar Vadivel Murugan 335bc99910SRamuthevar Vadivel Murugan reg: 345bc99910SRamuthevar Vadivel Murugan maxItems: 1 355bc99910SRamuthevar Vadivel Murugan 365bc99910SRamuthevar Vadivel Murugan clocks: 375bc99910SRamuthevar Vadivel Murugan maxItems: 1 385bc99910SRamuthevar Vadivel Murugan 39*9580b22aSWan Ahmad Zainie clock-names: 40*9580b22aSWan Ahmad Zainie items: 41*9580b22aSWan Ahmad Zainie - const: emmcclk 42*9580b22aSWan Ahmad Zainie 435bc99910SRamuthevar Vadivel Muruganrequired: 445bc99910SRamuthevar Vadivel Murugan - "#phy-cells" 455bc99910SRamuthevar Vadivel Murugan - compatible 465bc99910SRamuthevar Vadivel Murugan - reg 475bc99910SRamuthevar Vadivel Murugan - clocks 485bc99910SRamuthevar Vadivel Murugan 497f464532SRob HerringadditionalProperties: false 507f464532SRob Herring 515bc99910SRamuthevar Vadivel Muruganexamples: 525bc99910SRamuthevar Vadivel Murugan - | 535bc99910SRamuthevar Vadivel Murugan sysconf: chiptop@e0200000 { 545bc99910SRamuthevar Vadivel Murugan compatible = "intel,lgm-syscon", "syscon"; 555bc99910SRamuthevar Vadivel Murugan reg = <0xe0200000 0x100>; 564ae87b17SRob Herring #address-cells = <1>; 574ae87b17SRob Herring #size-cells = <1>; 585bc99910SRamuthevar Vadivel Murugan 594ae87b17SRob Herring emmc_phy: emmc-phy@a8 { 605bc99910SRamuthevar Vadivel Murugan compatible = "intel,lgm-emmc-phy"; 615bc99910SRamuthevar Vadivel Murugan reg = <0x00a8 0x10>; 625bc99910SRamuthevar Vadivel Murugan clocks = <&emmc>; 635bc99910SRamuthevar Vadivel Murugan #phy-cells = <0>; 645bc99910SRamuthevar Vadivel Murugan }; 655bc99910SRamuthevar Vadivel Murugan }; 66*9580b22aSWan Ahmad Zainie 67*9580b22aSWan Ahmad Zainie - | 68*9580b22aSWan Ahmad Zainie phy@20290000 { 69*9580b22aSWan Ahmad Zainie compatible = "intel,keembay-emmc-phy"; 70*9580b22aSWan Ahmad Zainie reg = <0x20290000 0x54>; 71*9580b22aSWan Ahmad Zainie clocks = <&emmc>; 72*9580b22aSWan Ahmad Zainie clock-names = "emmcclk"; 73*9580b22aSWan Ahmad Zainie #phy-cells = <0>; 74*9580b22aSWan Ahmad Zainie }; 755bc99910SRamuthevar Vadivel Murugan... 76