xref: /linux/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml (revision 4ae87b17cc327f32335608f953681906cdcf69fc)
15bc99910SRamuthevar Vadivel Murugan# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
25bc99910SRamuthevar Vadivel Murugan%YAML 1.2
35bc99910SRamuthevar Vadivel Murugan---
45bc99910SRamuthevar Vadivel Murugan$id: http://devicetree.org/schemas/phy/intel,lgm-emmc-phy.yaml#
55bc99910SRamuthevar Vadivel Murugan$schema: http://devicetree.org/meta-schemas/core.yaml#
65bc99910SRamuthevar Vadivel Murugan
75bc99910SRamuthevar Vadivel Murugantitle: Intel Lightning Mountain(LGM) eMMC PHY Device Tree Bindings
85bc99910SRamuthevar Vadivel Murugan
95bc99910SRamuthevar Vadivel Muruganmaintainers:
105bc99910SRamuthevar Vadivel Murugan  - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
115bc99910SRamuthevar Vadivel Murugan
125bc99910SRamuthevar Vadivel Murugandescription: |+
135bc99910SRamuthevar Vadivel Murugan  Bindings for eMMC PHY on Intel's Lightning Mountain SoC, syscon
145bc99910SRamuthevar Vadivel Murugan  node is used to reference the base address of eMMC phy registers.
155bc99910SRamuthevar Vadivel Murugan
165bc99910SRamuthevar Vadivel Murugan  The eMMC PHY node should be the child of a syscon node with the
175bc99910SRamuthevar Vadivel Murugan  required property:
185bc99910SRamuthevar Vadivel Murugan
195bc99910SRamuthevar Vadivel Murugan  - compatible:         Should be one of the following:
205bc99910SRamuthevar Vadivel Murugan                        "intel,lgm-syscon", "syscon"
215bc99910SRamuthevar Vadivel Murugan  - reg:
225bc99910SRamuthevar Vadivel Murugan      maxItems: 1
235bc99910SRamuthevar Vadivel Murugan
245bc99910SRamuthevar Vadivel Muruganproperties:
255bc99910SRamuthevar Vadivel Murugan  compatible:
265bc99910SRamuthevar Vadivel Murugan      const: intel,lgm-emmc-phy
275bc99910SRamuthevar Vadivel Murugan
285bc99910SRamuthevar Vadivel Murugan  "#phy-cells":
295bc99910SRamuthevar Vadivel Murugan    const: 0
305bc99910SRamuthevar Vadivel Murugan
315bc99910SRamuthevar Vadivel Murugan  reg:
325bc99910SRamuthevar Vadivel Murugan    maxItems: 1
335bc99910SRamuthevar Vadivel Murugan
345bc99910SRamuthevar Vadivel Murugan  clocks:
355bc99910SRamuthevar Vadivel Murugan    maxItems: 1
365bc99910SRamuthevar Vadivel Murugan
375bc99910SRamuthevar Vadivel Muruganrequired:
385bc99910SRamuthevar Vadivel Murugan  - "#phy-cells"
395bc99910SRamuthevar Vadivel Murugan  - compatible
405bc99910SRamuthevar Vadivel Murugan  - reg
415bc99910SRamuthevar Vadivel Murugan  - clocks
425bc99910SRamuthevar Vadivel Murugan
435bc99910SRamuthevar Vadivel Muruganexamples:
445bc99910SRamuthevar Vadivel Murugan  - |
455bc99910SRamuthevar Vadivel Murugan    sysconf: chiptop@e0200000 {
465bc99910SRamuthevar Vadivel Murugan      compatible = "intel,lgm-syscon", "syscon";
475bc99910SRamuthevar Vadivel Murugan      reg = <0xe0200000 0x100>;
48*4ae87b17SRob Herring      #address-cells = <1>;
49*4ae87b17SRob Herring      #size-cells = <1>;
505bc99910SRamuthevar Vadivel Murugan
51*4ae87b17SRob Herring      emmc_phy: emmc-phy@a8 {
525bc99910SRamuthevar Vadivel Murugan        compatible = "intel,lgm-emmc-phy";
535bc99910SRamuthevar Vadivel Murugan        reg = <0x00a8 0x10>;
545bc99910SRamuthevar Vadivel Murugan        clocks = <&emmc>;
555bc99910SRamuthevar Vadivel Murugan        #phy-cells = <0>;
565bc99910SRamuthevar Vadivel Murugan      };
575bc99910SRamuthevar Vadivel Murugan    };
585bc99910SRamuthevar Vadivel Murugan...
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