xref: /linux/Documentation/devicetree/bindings/phy/brcm,sr-pcie-phy.yaml (revision 8582976acc8504cec53a7b6fed493435eba8437f)
1*6725c334SRob Herring (Arm)# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*6725c334SRob Herring (Arm)%YAML 1.2
3*6725c334SRob Herring (Arm)---
4*6725c334SRob Herring (Arm)$id: http://devicetree.org/schemas/phy/brcm,sr-pcie-phy.yaml#
5*6725c334SRob Herring (Arm)$schema: http://devicetree.org/meta-schemas/core.yaml#
6*6725c334SRob Herring (Arm)
7*6725c334SRob Herring (Arm)title: Broadcom Stingray PCIe PHY
8*6725c334SRob Herring (Arm)
9*6725c334SRob Herring (Arm)maintainers:
10*6725c334SRob Herring (Arm)  - Ray Jui <ray.jui@broadcom.com>
11*6725c334SRob Herring (Arm)
12*6725c334SRob Herring (Arm)description: >
13*6725c334SRob Herring (Arm)  For PAXB based root complex, one can have a configuration of up to 8 PHYs.
14*6725c334SRob Herring (Arm)  PHY index goes from 0 to 7.
15*6725c334SRob Herring (Arm)
16*6725c334SRob Herring (Arm)  For the internal PAXC based root complex, PHY index is always 8.
17*6725c334SRob Herring (Arm)
18*6725c334SRob Herring (Arm)properties:
19*6725c334SRob Herring (Arm)  compatible:
20*6725c334SRob Herring (Arm)    const: brcm,sr-pcie-phy
21*6725c334SRob Herring (Arm)
22*6725c334SRob Herring (Arm)  reg:
23*6725c334SRob Herring (Arm)    maxItems: 1
24*6725c334SRob Herring (Arm)
25*6725c334SRob Herring (Arm)  '#phy-cells':
26*6725c334SRob Herring (Arm)    const: 1
27*6725c334SRob Herring (Arm)
28*6725c334SRob Herring (Arm)  brcm,sr-cdru:
29*6725c334SRob Herring (Arm)    description: phandle to the CDRU syscon node
30*6725c334SRob Herring (Arm)    $ref: /schemas/types.yaml#/definitions/phandle
31*6725c334SRob Herring (Arm)
32*6725c334SRob Herring (Arm)  brcm,sr-mhb:
33*6725c334SRob Herring (Arm)    description: phandle to the MHB syscon node
34*6725c334SRob Herring (Arm)    $ref: /schemas/types.yaml#/definitions/phandle
35*6725c334SRob Herring (Arm)
36*6725c334SRob Herring (Arm)additionalProperties: false
37*6725c334SRob Herring (Arm)
38*6725c334SRob Herring (Arm)examples:
39*6725c334SRob Herring (Arm)  - |
40*6725c334SRob Herring (Arm)    phy@40000000 {
41*6725c334SRob Herring (Arm)        compatible = "brcm,sr-pcie-phy";
42*6725c334SRob Herring (Arm)        reg = <0x40000000 0x800>;
43*6725c334SRob Herring (Arm)        brcm,sr-cdru = <&cdru>;
44*6725c334SRob Herring (Arm)        brcm,sr-mhb = <&mhb>;
45*6725c334SRob Herring (Arm)        #phy-cells = <1>;
46*6725c334SRob Herring (Arm)    };
47